455281A 456060-2 QSDM ATP.doc

455281A

SHAPE \* MERGEFORMAT

REVISIONS

STILLWATER, OKLAHOMA 74076-1023

FOR THE QUAD SYNCHRO DECODER MODULE (QSDM)

(P/N 456060-2)

CODE IDENT.

63812 455281A

ACCEPTANCE TEST PROCEDURE

FOR THE QUAD SYNCHRO DECODER

MODULE (QSDM)

(P/N 456060-2)

TABLE OF CONTENTS

Section Title Page

GENERAL INFORMATION

1.1

SCOPE

1.2

PURPOSE

1.3

TEST EQUIPMENT

1.4

LRADDS TEST RACK

1.5

GENERAL REQUIREMENTS

1.5.1 Production Routers 1.5.2 Test Conditions 1.5.3 Failure Reporting

1.5.4 Script Files 1.5.5 Test Data

PRE-TEST EVALUATION

2.1

CONTINUITY TEST

2.2

INSTALLATION AND SETUP PROCEDURE

2.2.1 Software and Firmware Installation 2.3

AUTOMATED TEST PROGRAM

BURN-IN

FINAL TEST

4.1

AUTOMATED TEST PROGRAM

TABLE OF CONTENTS (Continued)

Section Title Page

APPENDIX A

PRODUCTION ROUTERS

A-1

APPENDIX B

NON-CONFORMANCE REPORTS (NCRs) B-1

APPENDIX C

BURN-IN LOG

C-1

LIST OF FIGURES

Figure Title Page 1.1-1 Testing Flow

1.4-1 Functional Test Setup 2.2-1 IIU LRADDS Test Rack Configuration

LIST OF TABLES

Table Title Page 1.3-1 Test Equipment 1.5.4-1 Script Files 2.1-1 Short Test Table

2.2-1 456370-2 IFF Interface Module Switch Settings 2.2-2 DIM Switch Settings for 456063-1

2.2-3 DIM Switch Settings for 456357-1 or 456357-2

2.3-1 Pre-Test Verification Table 3-1 Burn-in Test Information 4.1-1 Final Test Verification Table

SECTION 1

GENERAL INFORMATION

1.1

SCOPE

This document contains the test requirements for the acceptance testing of the Quad Synchro Decoder Module (QSDM) (P/N 456060-2). This document contains the following sections:

Section 1: General Information

Section 2: Pre-Test Evaluation Procedures

Section 3: Burn-In Procedures

Section 4: Final Test Procedures

Figure 1.1-1 illustrates the order of testing.

Figure 1.1-1. Testing Flow

1.2

PURPOSE

The purpose of this document is to demonstrate that the Quad Synchro Decoder Module (QSDM), as manufactured by Frontier Electronic Systems, meets or exceeds all requirements identified within this document.

1.3

TEST EQUIPMENT

Table 1.3-1 lists the equipment required to perform the procedures contained in this document. Enter the serial number and calibration expiration date for each piece of test equipment.

Table 1.3-1. Test Equipment

SPECIFICATIONS

CALIBRATION

EXP. DATE

Tektronix

Fluke

Note 1: FES maintains calibration of equipment IAW ISO 9001, procedures FES-QSP-7.6-1-1 and FES-QSP-7.6-2.

Note 2: Equivalent or superior equipment may be substituted for the equipment listed above.

1.4 LRADDS Test rack Figure 1.4-1 illustrates the equipment required to perform the procedures contained in this document.

Note: The figure below is for reference only and is not representative of the actual test setup. Refer to later steps in the test procedure for specific setup instructions.

Figure 1.4-1. Functional Test Setup

1.5

GENERAL REQUIREMENTS

1.5.1 Production Routers

Insert the Production Routers for the module into Appendix A.

1.5.2 Test Conditions

Unless otherwise specified herein, testing shall be performed at standard room ambient temperature, 60( to 80(F.

1.5.3 Failure Reporting

Non-Conformance Reports (NCRs) shall be used to document test failures in accordance with FES-QSP-8.3-3 when required. A copy of the NCR shall be included under Appendix B.

1.5.4 Script Files The script files required for testing are shown in the table below. A controlled copy of the QSDM script file resides in Document Control under Mstr_software\456271\-01 Rev X\ (where X is the latest revision).

Table 1.5.4-1. Script Files

1.5.5 Test Data Successful completion of each test shall be annotated within these procedures. Test data recorded during automated testing shall be maintained on the FES network at \\Fes-dc\data3\Shared Data\Naval Systems\Test Data\part number\serial number

SECTION 2

PRE-TEST EVALUATION

This section contains the steps for conducting a preliminary test of the Quad Synchro Decoder Module (QSDM) before subjecting it to a burn-in cycle.

2.1

CONTINUITY TEST

Using a digital multi-meter (DMM), verify that the power planes are not shorted together or to ground. Refer to schematic drawing 456437, sheet 1 to locate measuring points.

1. Verify that there is no short between the following points, where a short is less than 5 Ohms. Measure points for a maximum duration of 5 seconds. Test points TP1 through TP6 are GND.

Table 2.1-1. Short Test Table

GND

TP1-6

+1.2V

U39 Pin 4 +1.8V

U20 Pin 5 +3.3

U38 Pin 4 +5V

U38 Pin 2

+5VA

U13 Pin 3

-5VA

U19 Pin 3 +12V

+ side of C181

+1.2V

U39 Pin 4

+1.8V

U20 Pin 5

+3.3

U38 Pin 4

+5V

U38 Pin 2

+5VA

U13 Pin 3

-5VA

U19 Pin 3

+12V

+ side of C181

-12V

- side of C99

VERIFIED: _____________

2.2

INSTALLATION AND SETUP PROCEDURE

The installation and setup procedure verifies the test configuration.

1. Remove power from the IFF Interface Unit (IIU) and Display Interface Unit (DIU) Test Chassis being tested.

2. Install Quad Synchro Decoder Module (QSDM) (P/N 456060-2) into the IIU Test Chassis.

3.

Remove the IFF Interface Module (IIM) Gold Board and set its switches as shown in Table 2.2-1. Depending on the model number.

Table 2.2-1. 456370-2 IFF Interface Module Switch Settings

SWITCH

SYNCHRO OUTPUT 8192

S1-2

S1-3

S1-4

S1-5

S1-6

S1-7

S1-8

ON

S2-2

ON

S2-3

ON

S2-4

ON

S3-2

S3-3

S3-4

ON

S6-2

S6-3

S6-4

S7

SIM

*Closed = ON; Open = OFF 4.

Install the IIM Gold Board into slot 1 of the IIU Test Chassis.

5.

Remove the Display Interface Module (DIM) Gold Board from the DIU Test Chassis and set its switches as shown in Table 2.2-2 or Table 2.2-3.

Table 2.2-2. DIM Switch Settings for 456063-1

SWITCH

3 WIRE OUTPUT 8192

S1-2

Display Type

S1-3

S1-4

Azimuth Rate

S1-5

S1-6

S1-7

Video SIM

S1-8

AZ True/Relative

S4-2

S4-3

S4-4

S4-5

S4-6

S4-7

S4-8

S5-2

S5-3

S5-4

S11

SIM

S16

Local Select

S17

S18

ON

S19-2

ON

S19-3

S19-4

Table 2.2-3. DIM Switch Settings for 456357-1 or 456357-2

SWITCH

3 WIRE OUTPUT 8192

S1-2

Display Type

S1-3

S1-4

Azimuth Rate

S1-5

S1-6

S1-7

Video SIM

S1-8

AZ True/Relative

S2-2

S2-3

S2-4

S3-2

S3-3

S3-4

S3-5

S3-6

S3-7

S3-8

ON

S4-2

ON

S4-3

S4-4

S9-2

S9-3

S9-4

S10

SIM

S11

Local Select

S12

S13

6.

Install the DIM Gold Board into slot 1 of the DIU Test Chassis.

7.

Connect the IIU LRADDS Test Rack cables as shown in Figure 2.2-1.

Figure 2.2-1. IIU LRADDS Test Rack Configuration 8.

Apply power to the LRADDS Test Fixture (if required) and the IIU and DIU Test Chassis.

2.2.1 Software and Firmware Installation

This step of the procedure details the loading of the Firmware listed on Assembly Number 456060-2. These procedures are performed using the LRADDS Test and Scripting Processor.

1. Plug in the Xilinx programming cable into J1. Insert the board into the VME chassis and apply power to the board.

2. Open the Impact 14.4 Program.

3. Select create a new project and click OK.

4. On the next prompt, click Finish.

5. At the next prompt, click Cancel All.

6. At the next prompt, click OK.

7. Right click on the first device labeled xcf32p and select assign new configuration file.

8. Find file 456443X.msc in location:

\\fes-dc\Data3\Document Control\Mstr_software\456443\-01 Rev X

(where X is the latest revision)

9. Right click on the xcf32 and select Program.

10. Click OK.

11. Right click on the xcf32p icon and select Verify.

12. Record the revision number.

456443 Rev:__________

13. Verify that the firmware and software have been loaded without failures.

14. Create and apply the label for Part Number flashed per Assembly Drawing 456060-2. Verify below.

2.3

AUTOMATED TEST PROGRAM

These procedures are performed using the LRADDS Tester and the Scripting Processor.

1. To start testing select the LRADDS Automated Tester icon on the Desktop and follow the displayed instructions.

2. A dialog box “Interface Configurations” appears showing the expected Comm Port Assignments.

a.

Verify that the Communication Ports and GPIB Address are set as they appear in the display.

b.

Select OK when complete.

3. Click on the “Test Info” button.

4. A dialog box prompting for “Tester Identification” will be displayed. Enter the tester information and press Enter.

5. A dialog box will be displayed requesting a Serial Number. Enter the serial number of the Quad Synchro Decoder Module (QSDM) being tested and press Enter.

6. Select test type “Module Level Testing” and then “Preliminary”.

7. At the Module Selection screen, select “Quad Synchro Decoder Module”.

8. From the displayed Main Screen Menu, select the LOAD TEST option. The names of the tests that can be run will be displayed.

9. Click on the “Select All” button.

10. The Main Screen will be displayed showing the entered information. From this display, select the BEGIN TEST option. The program will now display dialog boxes to provide the operator with step-by-step instructions for completing the test. Upon completion of each test, annotate the appropriate entry in Table 2.3-1.

Table 2.3-1. Pre-Test Verification Table

11. Copy and verify data files have been copied to \\Fes-dc\data3\Shared Data\Naval Systems\Test Data\part number\serial number

SECTION 3

BURN-IN

This section contains the procedures to be followed to accomplish a burn-in cycle on the Quad Synchro Decoder Module (QSDM).

1.

Place the Quad Synchro Decoder Module (QSDM) into a test bed capable of providing power to the module per VMEbus standards.

2.

Place the test bed into a thermal chamber.

3.

Complete a 48 hour (minimum) burn-in cycle at 45°C ± 5°C with power applied to the module.

4.

In Table 3-1 record the time and date of the beginning and end of the cycle and the total burn-in time.

Table 3-1. Burn-in Test Information

Date/Time

5.

Insert the temperature burn-in chart into Appendix C.

Completion Verified: ________________

SECTION 4

FINAL TEST

This section details the functional testing of the Quad Synchro Decoder Module (QSDM).

4.1

AUTOMATED TEST PROGRAM

These procedures are performed using the LRADDS Test Rack and the Scripting Processor.

1. Perform Section 2.1, Installation and Setup Procedure.

2. Select the LRADDS Automated Tester icon on the Desktop and follow the displayed instructions.

3. A dialog box “Interface Configurations” appears showing the expected Comm Port Assignments.

a.

Verify that the Communication Ports and GPIB Address are set as they appear in the display.

b.

Select OK when complete.

4. Click on the “Test Info” button.

5. A dialog box prompting for “Tester Identification” will be displayed. Enter the tester information and press Enter.

6. A dialog box will be displayed requesting a Serial Number. Enter the serial number of the Quad Synchro Decoder Module (QSDM) being tested and press Enter.

7. Select test type “Module Level Testing” and then “Final”.

8. At the Module Selection screen, select “Quad Synchro Decoder”.

9. From the displayed Main Screen Menu, select the LOAD TEST option. The names of the tests that can be run will be displayed.

10. Click on the “Select All” button.

11. The Main Screen will be displayed showing the entered information. From this display, select the BEGIN TEST option. The program will now display dialog boxes to provide the operator with step-by-step instructions for completing the test. Upon completion of each test, annotate the appropriate entry in Table 4.1-1.

Table 4.1-1. Final Test Verification Table

12. After the test is complete, select “Close File” to save the test data.

13. Copy data files to the network drive \\Fes-dc\data3\Shared Data\Naval Systems\Test Data\part number\serial number

Comments:

Validation

This sheet is supplied as a validation of the completion and accuracy of the data contained herein. The Test Technician will sign and date as an indication that all instructions have been followed and that each test step has been successfully completed. Signature by the Quality Engineer is an acknowledgement that the test data has been reviewed for completion and accuracy. The applicable test or inspection stamp will be affixed by the signature blocks

Test Technician: ________________________________Date:____________

Quality Engineer: _______________________________Date:____________

APPENDIX A

PRODUCTION ROUTERS

APPENDIX B

NON-CONFORMANCE REPORTS (NCRs)

APPENDIX C

BURN-IN LOG

MODULE TEST

REPAIR

BOARD PER

PARA 1.5.3

Module Test complete

Pass�Test?

ACCEPTANCE TEST PROCEDURE

FOR THE QUAD SYNCHRO DECODER MODULE (QSDM)

(P/N 456060-2)

S/N: _________________

08 JANUARY 2016

Prepared By:

FRONTIER ELECTRONIC SYSTEMS CORP.

P.O. BOX 1023

STILLWATER, OKLAHOMA 74076-1023

AUTOMATED

TEST PROGRAM

SECTION 4.1

INSTALLATION AND SETUP

SECTION 2.2

INSTALLATION

AND SETUP

SECTION 2.2

BURN-IN

BOARD

SECTION 3

Pass�Test?

AUTOMATED TEST PROGRAM SECTION 2.3

CONTINUITY TEST

SECTION 2.1

START�MODULE �TEST

FINAL TEST

Pre-test Evaluation

YES

NO

NO

YES

_1349680441.vsd text

Interface Panel RIU

LRADDS Test Fixture

SPY 6 Wire HRI

Sin/Cos

Synchro(4)

ACP/ARP

SPY 6-Wire PPI

Azimuth Radar Data

NW Sw (up to 4)

NW Sw (up to 4)

Protocol Analyzer H/W and SW (LEDA Plus)

3-Wire

Backplane

Power Supply

RIM (Golden)

RADDS

ACP/ARP

Synchro

RIM (Slot 2)

RIM (Slot 3)

RIM (Slot 4)

Interface Panel DIU

DIM (Golden)

DIM (Slot 2)

DIM (Slot 3)

DIM (Slot 4)

SpySSM

SSM

Interface Panel IIU

IIM (Golden)

IIM (Slot 2)

IIM (Slot 3)

IIM (Slot 4)

RIM Test Chassis (RIU)

DIM Test Chassis (DIU)

IIM Test Chassis (IIU)

IIM (Slot 5)

IIM (Slot 6)

IIM (Slot 7)

SBC

QSDM (UUT)

LRADDS Test Rack

NW Sw

NW Sw (up to 14)

CP-1273 Emulator

Video

Iron Box 24 port Network Switch

Dual Scan Cvtr Computer

Dual Scan Cvtr Computer

HMI Computer w/RS422 conv

Power Conditioner

2 -T

To RIU Lx (up to 4)

To DIU Lx (up to 4)

To IIU Lx (up to 14)

To CDS Lx (up to 13)

CDS Emulator

Lx (1)

Test Computer (Supermicro X7DBN Motherboard w/ 3 ea Intel EXPI9404PTL Quad Port NIC)

To Port Under test

Serial Data (2)

RADDS to 6W

NAV Data (RS-422)

6 Wire Out

Test System Configured For Quad Synchro Decoder Module Test

IFF Vid (2)

_1485072157.vsd