FA8650-19-S-1932_MINSAV_CALL_01_STATEMENT_OBJECTIVES.pdf
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- Microelectronics Innovation for Next-generation System Advancement and Validation (MINSAV) Advanced Research Announcement (ARA) with Calls Federal contract opportunity
- Solicitation number
- FA8650-19-S-1932
About this file
This document outlines requirements for a federal contract solicitation for the Microelectronics Innovation for Next-generation System Advancement and Validation (MINSAV) Advanced Research Announcement (ARA) with Calls. The solicitation will fund research and development of prototype systems demonstrating microelectronics capabilities that provide technical advantages for Department of Defense applications such as autonomous systems, artificial intelligence, precision navigation and timing, electronic warfare, and data processing. Key requirements include developing state-of-the-art microelectronic components; prototyping for obsolescence mitigation; constructing system demonstrators; developing function locking and fabrication integrity inspection technologies; implementing component lifecycle traceability; qualifying design intellectual property libraries; establishing foundry design flows; providing multi-foundry access; instantiating a microelectronics development marketplace; and developing persistent domestic expertise in advanced microelectronics. The period of performance is 39 months with $150 million in total anticipated funding over three fiscal years from the Department of the Air Force Materiel Command Research Laboratory.
FA8650-19-S-1932 Call 01 Statement of Objectives
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STATEMENT OF OBJECTIVES (SOO) – MINSAV CALL 01
Advanced Technology Center for Data Processing (ATC-DP)
24 September 2019
1.0 BACKGROUND
Microelectronics are the underpinning for scientific innovation and have enabled the US to maintain a technical edge in warfighting capability. Advanced microelectronics technology is fundamental to Department of Defense (DoD) priorities, and essential for next generation systems. Design, prototype development, and experimentation that leverages state-of-the-art (SOTA) microelectronics technologies provides an opportunity to enhance the U.S. commercial ecosystem and align commercial development with DoD needs to maintain U.S. microelectronics leadership. The merging of commercial development speed with military system knowledge is critical to rapid and regular insertion of microelectronics technologies that modernize systems, effectively countering the investments made by adversarial nations. In addition, microelectronics production has become a world-wide enterprise with multiple nations participating in construction and servicing of the machines required to fabricate at state of the art nodes. Technologies capable of preserving the confidentiality of military-relevant design content and facilitating inspection of the integrity of a manufactured device are key to assuring that SOTA devices can be used in DoD systems. Leveraging these capabilities by enabling assured access to advanced and future semiconductor technologies, developing and demonstrating commercial and DoD developed novel processing accelerators, and providing DoD programs and the defense industrial base (DIB) with the infrastructure, tools, and Intellectual Property (IP) to construct prototype systems is key to continuing to obtain the best supplies that will provide electronics-based technical overmatch for warfighting systems.
2.0 OBJECTIVE
The objective of the Advanced Technology Center for Data Processing (ATC-DP) effort is to design new military-relevant prototype demonstrators that leverage state-of-the-art microelectronics to provide differentiating capability for DoD applications. These demonstrators express data processing algorithms in SOTA microelectronics to provide computational offset at the sensor edge, data aggregation, and cloud processing nodes. ATC-DP creates these designs, leveraging commercial and DIB partners as well as government and academic sources. The ATC-DP program will perform technical analysis, assess advanced microelectronic technologies, explore integration of devices in military-relevant systems, and perform experimentation to analyze the impact of leveraging advanced microelectronics to accomplish military-related mission functions. The program will also investigate protections to ensure military unique chips are protected from malicious exploit (loss of DoD IP) and from malicious tampering during design, manufacturing, and supply chain lifecycle by addressing the entire microelectronics ecosystem.
3.0 TASKS AND TECHNICAL REQUIREMENTS
3.1. Develop Prototype SOTA Microelectronic Components
The contractor shall design, develop, and implement military-relevant prototype component designs using state-of-the-art microelectronics technology (i.e. ≤ 22nm technology node) that highlight the differentiating capability of the use of advanced microelectronics. The contractor shall construct advanced microelectronics development teams consisting of commercial, DIB, government, and academic partners. The contractor shall provide team management and mechanisms for integrating, protecting, and provisioning work from multiple sources. The contractor shall construct designs relevant to data processing that improve data processing performance by at least 10x.
3.2. Develop Prototype SOTA Microelectronics for Obsolescence Mitigation The contractor shall design, develop, and implement component designs using SOTA microelectronics technology to mitigate component obsolescence for DoD systems. The contractor shall construct designs to modernize obsolete components or specialize Commercial off the Shelf (COTS) components for economics, performance, or assurance.
3.3. Construct System Demonstrators for Rapid Insertion SOTA Microelectronics The contractor shall construct military system demonstration prototypes that implement designed SOTA microelectronics. The contractor shall demonstrate 10x differentiation achieved in one or more figures of merit (i.e. power, performance, area) in the system based on the application of SOTA microelectronics to an existing system.
3.3.1. Create Exemplars of Use of SOTA Electronics in Systems Used by Programs of Record The contractor shall construct prototype system demonstrators that use custom designed SOTA microelectronics (i.e. those created in 3.1) in a system used by a Program of Record.
3.3.2. Construct Demonstrators that Mitigate Obsolescence Supply Chain Risk for Sustainment The contractor shall construct demonstration systems that mitigate supply chain risk for systems in sustainment due to component obsolescence using components constructed in 3.2.
3.4. Develop and Evaluate Function Locking Protection Technologies The contractor shall construct and implement protection techniques that lock design function to prevent exposure of sensitive information during the fabrication process. The contractor shall implement protection techniques to significant portions of a range of design types and produce netlists and layout databases for evaluation. The contractor shall evaluate the protection achieved and provide an analysis for the design types that quantifies the level of protection.
3.5. Demonstrate and Evaluate Fabrication Integrity Inspection Structures The contractor shall create, design, and implement a range of inspection structures that provide assessment of the integrity of both the front end and back end of microelectronic fabrication. The contractor shall devise means of testing these structures by probing and by on-chip test infrastructure and create quantified correlation measures that define the resolution and accuracy of each integrity assessment method. The contractor will fabricate the structures, test and evaluate the resolution, and analyze and quantify the resolution and accuracy provided by the test structures.
3.6. Construct Component Lifecycle System with Full Traceability and Provenance The contractor shall construct a component lifecycle system that provides full traceability and provenance through the design, manufacture, package, test, provisioning, and validation and verification stages of component life. The contractor shall implement a system that maximizes the use of economically feasible commercial assurance practices that are enhanced to support DoD needs and show a relevant business purpose outside of the DoD. The contractor shall implement a system that supports multi-classification component development and provides data access infrastructure for generation of assessments, metrics, and quantification of supply chain risk.
3.7. Produce Vetted and Qualified Libraries of Design Intellectual Property (IP) The contractor shall produce and capture in a repository functionally vetted and silicon qualified libraries of design Intellectual Property (IP). The contractor shall capture the software, scripts, Hardware Description Language (HDL) files, and configuration settings for the IP verification, design, physical implementation, and the test and validation infrastructure for IP designs in at least three (3) SOTA technology nodes.
3.8. Construct SOTA Foundry Design and Implementation Flows
The contractor shall construct foundry design and implementation flows for at least three (3) SOTA technologies in at least two (2) different US-based foundries. The contractor developed flow shall make Electronic Design Automation (EDA) tools, design platforms, and IP portable between foundries. The contractor shall capture flow software, scripts, and methodology documentation in a repository that can be made widely available to DoD microelectronics developers.
3.9. Construct a Multi-Foundry SOTA Access Model
The contractor shall develop a front-door, multi-foundry access model for SOTA US-based microelectronic fabrication services. The contractor shall construct a model that provides Multi Project Wafer (MPW) fabrication runs and pre-negotiated Non-Disclosure Agreements (NDAs) for access to foundational digital Intellectual Property (IP) and Process Design Kits (PDKs). The contractor shall provide a model that enables aggregation of designs for MPW fabrication with all associated backend design capabilities.
3.10. Instantiate Microelectronics Development Marketplace
The contractor shall instantiate a development marketplace that serves as a pipeline to implement innovative ideas and novel technologies in SOTA microelectronic nodes by traditional DoD and non-traditional performers. The contractor shall develop and implement business models for access to facilities, infrastructure, tools, services, and expertise required to express ideas in SOTA microelectronics. The contractor shall establish models for sharing assurance and protection tools and techniques to facilitate wide adoption. The contractor shall develop prototype standards for assurance and protections.
3.11. Develop US-Based SOTA Microelectronics Persistent Expertise The contractor shall develop and implement a plan to develop a U.S. Citizen-based persistent expertise in SOTA microelectronics. The contractor shall develop relationships with university participants in the ATC-DP that increase the number of U.S. students participating at the university in microelectronics-related disciplines. The contractor shall provide metrics demonstrating the increase in U.S. persons participating in microelectronics due to the implementation of the plan.
4.0 PROGRAM MANAGEMENT
The contractor shall exercise program administrative and financial functions during the course of this effort. These functions shall include: scheduling and tracking activities/milestones; subcontractor management; reporting program status and identifying risks, problems, and mitigation strategies;
ensuring deliveries; planning, forecasting, recommending budgeting, budgeting changes, and follow-on efforts; and documenting technical breakthroughs or discoveries. The contractor shall support conducting research, design, development, and experimentation both on-site (i.e., at a Government facility) and off-site (i.e., at the contractor’s facility) as appropriate.
5.0 PERIOD OF PERFORMANCE
The period of performance is anticipated to be 39 months (36 months for the technical effort and 3 months for final reporting).
6.0 FUNDING PROFILE
The total anticipated amount for this effort is $150M.
Funding Type FY19 FY20 FY21 Total
RDT&E $50,000,000 $50,000,000 $50,000,000 $150,000,000
7.0 DELIVERABLES
The contractor shall deliver all reporting requirements in accordance with the Contract Data Requirements List (CDRLs), Exhibit A to the model contract, attached to the ARA.
Deliverable Description Schedule A001 Final Report Month 39 A002 Funds & Man-hour Expenditure Report Monthly A003 Contract Funds Status Report Quarterly A004 Scientific and Technical Reports Spend Plan Monthly A005 Status Report Monthly A006 Presentations & Workshops As Required A007 Source Code As Required A008 SW Architecture Descriptions As Required A009 Data Accession Lists As Required A010 Hardware User Manual As Required A011 Software User Manual As Required
Any/all hardware developed/purchased for this effort, including by not limited to microelectronic prototypes and wafer runs, shall be delivered.
Any/all software developed/purchased for this effort shall be delivered. The performer shall deliver all intellectual properties (IPs) and source code developed during and/or used for the MINSAV effort. The performer shall deliver all the CAD and EDA files, including scripts, RTL, HDL, netlists, simulation files (e.g., MATLAB, ADS, SPICE, Cadence, Synopsys, Mentor Graphics, etc.), test benches, schematics, layouts (e.g. GDS, etc.), design databases, component lifecycle traceability and provenance databases, verification databases, timing information, and mechanical drawings of the Integrated Circuits and Systems; algorithms; test assemblies; all package design and drawings (schematics, layouts, etc.); the PCB/module test/evaluation board designs, schematics, bill of materials (BOMs), and drawings; full design and verification projects, test benches, and behavioral and functional models for all IPs' functions and operations; comprehensive reports and documentation including information for future IP reuse by another party; comprehensive reports including the principles of function, operation, performance, design methodologies and choices, verification methodologies and choices; hierarchical list identifying all ancillary/building blocks, foundation IP, and functional IP; list and versions of all EDA/CAD tools, internal tools, methodologies, scripts, and PDK versions; all design review (e.g. PDR, CDR, FDR, etc.) documents; interfacing of the designs of the integrated circuits and systems along with detailed test and verification plans and developed supporting software; engineering support; and performing hardware prototypes/test articles demonstrating capabilities. The performer shall ensure that all IPs are licensed appropriately including the complete transfer/transition to the USG. The performer shall deliver above items no later than three (3) months after the end the technical effort.
8.0 AFRL SECURITY, SAFETY AND BASE ACCESS
OPSEC: General Operations Security (OPSEC) procedures, policies, and awareness are required in an effort to reduce program vulnerability from successful adversary collection and exploitation of critical information. OPSEC will be applied throughout the lifecycle of the contract. The Critical Information List (CIL) will be provided upon request by the AFRL/RYOY Information Protection Office. While working on the government installation, OPSEC will be provided by AFRL/RYOY Information Protection Office. While working on the government installation, OPSEC guidance and OPSEC training will be provided by AFRL/RYOY Information Protection Office. This training will ensure contractors are familiar with RY’s CIL and RY’s OPSEC Plan as it pertains to their contract. The contractor shall apply OPSEC in their management of their current program IAW AFI 10-701 Operations Security and WPAFB Supplement to
AFI-10-701.
PPP: All DoD contractors (including subcontractors) shall supplement their current security practices by requiring any personnel involved in executing this contract where critical program information (CPI) has been identified to protect the CPI to the standards articulated in the Program Protection Plan and in accordance with DoDI 5200.39. Upon contract award, all identified DoD contractors (including subcontractors) shall acknowledge and meet the requirements stated by the Program Manager for the protection of CPI. The DoD contractor must immediately notify the U.S. Government upon the discovery of any nonconformance with CPI protection.
SAFETY: The Contractor shall comply with all Air Force, federal, state, and local safety and environmental regulations. An approved safety plan in accordance with AFI 91-202 AFRL Supplement 1 shall be obtained before any experiment can be conducted at Wright-Patterson AFB and shall comply with all Air Force safety and environmental regulations. The contractor shall comply with system safety requirements contained in MIL-STD 882E, section 4, "General Requirements" for any deliverable systems or hardware and software interfaces with those components. The contractor shall test and verify the safety-critical hardware and software for safety acceptance.
PROGRAM SECURITY CLASSIFICATION: This effort will be unclassified.
ITAR: It is anticipated that export controlled data restrictions will be applied to this program, therefore ITAR data transmission and storage procedures will be followed accordingly.
GOVERNMENT FURNISHED PROPERTY: GFP is not anticipated to be made available under this effort.
BASE SUPPORT/NETWORK ACCESS: Base support is not anticipated. However, contractor will require computer/network use and as such Common Access Cards (CAC) will be issued.
| 1.0 Background |
| 2.0 OBJECTIVE |
| 3.0 TASKS and Technical Requirements |
| 3.1. Develop Prototype SOTA Microelectronic Components |
| 3.2. Develop Prototype SOTA Microelectronics for Obsolescence Mitigation |
| 3.3. Construct System Demonstrators for Rapid Insertion SOTA Microelectronics |
| 3.3.1. Create Exemplars of Use of SOTA Electronics in Systems Used by Programs of Record |
| 3.3.2. Construct Demonstrators that Mitigate Obsolescence Supply Chain Risk for Sustainment |
| 3.4. Develop and Evaluate Function Locking Protection Technologies |
| 3.5. Demonstrate and Evaluate Fabrication Integrity Inspection Structures |
| 3.6. Construct Component Lifecycle System with Full Traceability and Provenance |
| 3.7. Produce Vetted and Qualified Libraries of Design Intellectual Property (IP) |
| 3.8. Construct SOTA Foundry Design and Implementation Flows |
| 3.9. Construct a Multi-Foundry SOTA Access Model |
| 3.10. Instantiate Microelectronics Development Marketplace |
| 3.11. Develop US-Based SOTA Microelectronics Persistent Expertise |
| 4.0 Program Management |
| 5.0 period of performance |
| 6.0 funding profile |
| 7.0 Deliverables |
| 8.0 AFRL Security, Safety and Base Access |
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