AMENDMENT III.docx
DOCX document 77 KB Posted
- Solicitation number
- 1333ND25QNB030052
About this file
Amendment 0003 for a Department of Commerce National Institute of Standards and Technology (NIST) solicitation provides technical clarifications for an FPGA-based memory device characterization board design project. The amendment addresses detailed technical questions about the board's architecture, including ADC-DAC module specifications, interface protocols, and system interactions. Key technical details include a 40MHz SPI interface, 200MHz maximum operating frequency for memory devices, and confirmation that the external system is a host PC that receives characterization outputs via ethernet or USB.
The document specifies that memory modules (MRAM, RRAM) will be present on the board, with the FPGA sending characterization inputs through DACs and reading outputs through ADCs. NIST will provide specific components like sockets and ADC/DAC part numbers, and vendors are not required to purchase these components. The characterization platform's purpose is to feed analog input voltage through the DAC to memory devices and calculate device resistance through ADC and Trans Impedance Amp circuitry.
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Other files
| File | Type | Posted |
|---|---|---|
| AMENDMENT IV.docx | DOCX document | |
| AMENDMENT II.docx | DOCX document | |
| SOW.pdf | ||
| 1333ND25QNB030052.docx | DOCX document |
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AMENDMENT 0003
Question: Should quotations include the SOM pricing for all 10 units as a part in the board unit cost.
Answer: No. As mentioned in the Fabrication and Assembly capabilities “Main components like the SOM and the memory chip mounting socket required for assembly will be provided as part of the contract”
Question: It is assumed that there is an external analog system that sends the instructions (like memory characterization actions, endurance, and read/write latency) and tuning parameters to the ADC- DAC module. Please confirm this understanding is correct and please explain the external system that is interfaced with the module in more detail.
Answer: ADC-DACs have a SPI interface operating at 40Mhz. The instructions to the ADC/DACs will be sent through this Interface from the FPGA board.
Question: Please explain what are the types of input (Voltage/current or any other protocol) that external system sends out to ADC-DAC module.
Answer: Apart from the power and SPI interface IOs, the inputs to the ADC come from our memory chip + Trans Impedance Amp circuitry. DAC inputs come directly from the FPGA board through the SPI interface. The purpose of the characterization platform is to feed analog input voltage through the DAC to the memory chip (MRAM,RRAM) and read the current from them memory device to calculate the resistance of the memory devices through the ADC and TIA circuit.
Question: Is the external system also a memory module with a controller? And should the characterization output from the FPGA be sent to the external system through DAC?
Answer: The external system is just a host PC. The PC will read the characterization output from the FPGA through an ethernet or USB interface.
Question: Please confirm if the memory modules are expected to be present in the ADC-DAC module and FPGA directly sends the characterization output to the memory module as digital data?
Answer: Yes. Memory module will be present in the board that had ADCs and DACs. FPGA sends characterization input to the memory module through DAC and reads characterization output from the memory module through ADCs.
Question: What is the maximum operating frequency of the targeted memories (custom analog memory devices, RRAM, MRAM, PCM)?
Answer: 200Mhz. NIST has already chosen the ADCs and DACs. The part numbers will be provided.
Question: Should a single socket support multiple memory modules? If so, please provide details for the socket.
Answer: NIST shall provide the socket. Vendor not required to purchase them or include them in their firm fixed price quotation.
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