05_ATTACHMENT_16-R-EB05_TASK_ORDER_SOW.pdf

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RESEARCH AND DEVELOPMENT EFFORTS FOR DIGITAL SIGNAL PROCESSING (DSP) and SOFTWARE DEVELOPMENT Federal contract opportunity
Solicitation number
N00173-16-R-EB05
Issued by
Department of the Navy Secretary of the Navy Office of Naval Research

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Attachment 05: Task Order Statement of Work

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N00173-16-R-EB05_AMENDMENT_0001.pdf PDF
Q&A_RESPONSE_01_16-R-EB05.pdf PDF
08_ATTACHMENT_16-R-EB05_PAST_PERFORMANCE_INFORMATION.pdf PDF
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EXHIBIT_A_16-R-EB05_DD1423_A001-A010.pdf PDF
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04_ATTACHMENT_16-R-EB05_REQ_FOR_ON-SITE_KTRS.pdf PDF
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Development, Modification, and Upgrade to Software and Firmware of ESM Solicitation No.: N00173-16-R-EB05

Systems/Subsystems Attachment 05 – Task Order Statement of Work

TASK ORDER STATEMENT OF WORK

Development, Modification, and Upgrade to Software and Firmware of ESM Systems/Subsystems

1.0 Introduction/Background

The ESM branch is engaged in the research and development (R&D) of advanced passive electronic warfare systems. ESM conducts R&D, prototype design, and operational testing of ESM systems/subsystems associated with all disciplines of modern ESM systems. The ESM efforts allow rapid deployment of emerging high-speed analog and DSP components and techniques for use in current

Surface Electronic Warfare Improvement Program (SEWIP) efforts and future ESM developed systems.

NRL requires support to assist the Government in the development and implementation of these new techniques in the operation of the system; in the performance of demonstrations; in the integration and test of new user hardware and/or software; and the maintenance, repair and enhancement of the subject systems. This effort will also provide a path to transition long term support, operation, maintenance, enhancement and configuration control to NRL and other Government developers and technical personnel.

2.0 Project Description

The contractor shall develop software and firmware for the New Platform ELINT Program currently under development in Code 5720. The contractor shall also be responsible for the modifications and upgrades to software and firmware for the existing Medusa, Ultra Wide Bandwidth (UWB), JSEI, and

Multi-platform Geolocation programs as needed. The effort includes development of software to process and record real time data being digitized and collected using the Annapolis Micro Systems

(AMS) family of WildStar FPGA processing boards.

3.0 Task Descriptions

3.1 New Platform (NP) ELINT Development Program Tasks

The ‘Cadre’ ELINT and Recorders System is an ESM collection system comprised of three semi-independent subsystems known as system elements. These elements are; 1) the ELINT80 four-channel, high-speed, digital recorder, 2) the REC500 two-channel, high-speed, digital recorder covering 500 MHz bandwidth, and 3) the ELINT500 processor which provides two channels each of low peak power high duty cycle (LPPHDC) processing, and pulse processing of the continuous digitized Intermediate frequency (CDIF) data produced by the REC500 system. Also included under the NP ELINT tasking is software and system integration/installation support for the ARGUS

System recently developed.

The following are specific tasks required for the Cadre ELINT80, REC80, and ELINT500 systems.

3.1.1 Development of a representative simulator for each of the Cadre system elements.

The simulator shall model the behavior of the real cadre hardware in its interactions with the Cadre operational server and GUI software. It will be required to produce data that replicates the data which is generated by the cadre firmware under the same conditions. This effort requires knowledge of and experience with the cadre embedded control software and firmware. The Simulator will be used to test and verify future Cadre system software upgrades.

3.1.2 Upgrade the existing Cadre Admin Tool.

This requires developing a GUI driven software tool with the capability to modify Cadre HTML configuration files. The tool shall provide the necessary communication with the Cadre VPX RAID boards to prevent having to work with the HW directly when the system needs to be reset/restarted.

The tool shall also provide maintenance controls (eg. Stop Circular Buffer (CB) Recording, and

Development, Modification, and Upgrade to Software and Firmware of ESM Solicitation No.: N00173-16-R-EB05 monitor status, error and debug data).

3.1.3 Provide an interface for downloading Cadre Circular Buffer data.

The existing graphical interface to the CB needs to be upgraded to be more user-friendly with greater control over Zoom and Selection.

3.1.4 Provide graphical pause, measurement and download features to all Cadre subsystems.

Model this after the behavior that currently exists for the Pulse Processor (DPCS). For example, the spectrum should allow pausing, measurement and downloading from a box on the screen. The download result could be either CDIF, spectral or both. (The ELINT500 LPPHDC processor needs this ability as well).

3.1.5 Expand Cadre’s capability to track Antenna position for all apertures.

Model this after the existing Spinning DF Antenna tracking capability.

3.1.6 Configuration Management (CM); Software.

The contractor shall implement, and maintain the Configuration Management (CM) program in accordance with its internal CM procedures. The CM program shall include configuration identification, control, and status accounting for the Cadre system revisions and new software releases. The contractor shall transition the CM program to the Government at a mutually agreed time prior to the completion of this effort.

3.2 The Medusa Program Development Tasks

Provide development and integration support for the GUI enhancements and control software required for the Medusa System.

3.3 The Multi-Platform Geo-Location Support

Provide development and integration support of the ‘Standpunkt’ planning tool and the collection equipment to be used for the geolocation field testing planned for FY18.

3.4 JSEI Program Update

Provide EW Systems Software improvements to the Java Specific Emitter Identification (JSEI) software currently being used by NAVAIR. In addition to software development and testing, the

Contractor shall also travel to CONUS locations as directed by the sponsor to perform software installation, configuration and integrated testing

3.5 AN/SLQ-32 V6 Analysis

Provide software development and integration support of the SLQ32 V6 Pulse data interface to the

Cadre system and subsequent display/analysis of the data using the Cadre ELINT500 pulse processor and DF Feather displays.

3.6 Special Receiver Programs

3.6.1 Portable LPI Receiver Development.

Develop a stand-alone LPPHDC Processing capability in a 2U workstation utilizing a PCIe FPGA processor board with an ADC front end. This effort requires experience with and an understanding of the current ‘SHAWNA’ system signal processing algorithms and software which will be used as a starting point for developing the Portable system on a new hardware platform. A portion of the new development requires the implementation of direct memory access (DMA) for transferring the real-time data from the PCIe processing board to the CPU. Development of a graphical pause, measurement and download feature shall also be required for the Portable LPI Receiver.

Development, Modification, and Upgrade to Software and Firmware of ESM Solicitation No.: N00173-16-R-EB05

3.6.2 UWB/Galina Receiver Program.

Provide Sponsor (NCWDG) requested GUI updates to the current UWB/Galina Receiver system.

Support System Installation and testing as required to CDSA-Dam Neck.

4.0 Deliverables

1) Cadre system Interface Design Document (IDD)

2) Software documentation for the Cadre server, GUI’s, and embedded processor

3) Final Upgraded DSP software and associated software documentation

5.0 Historical/Estimated Labor Categories and Hours

The following table provides an estimate of labor hours based on historical data. Contractors may propose labor categories and hours other than those in the chart.

Historical Labor Categories

Estimated Annual Hours

Year 1 Year 2

Digital Signal Processing (DSP) Engineer IV (Key) 1920 1920

Senior Software Engineer IV (Key) 3840 3840

Software Engineer III 5760 5760

Total 11,520 11,520

Full Time Equivalent (FTE) = 1920 hours

6.0 Period of Performance

The period of performance will be 24 months from date of award.

7.0 Other Direct Cost

ODC’s shall be cost-reimbursable and shall not include a fee. ODCs contain costs such as task related travel, material, equipment, and other related expenses that are unique to this requirement. ODCs do not include subcontractor labor and management costs.

The contractor shall utilize the following ODC amounts:

ODC Amount

Year 1 $100,000.00

Year 2 $100,000.00

Total $200,000.00

8.0 Transition-In

The Contractor shall follow the transition-in plan submitted as part of the Contractor's original proposal to the Base Contract.

Transition-In Period – up to 30 days. The period between contract award and contract commencement will constitute the Contract transition-in period. During the contract phase-in period, the Contractor shall prepare to assume full responsibility for all areas of operation in accordance with the terms and conditions of this contract. Contractor shall take all actions required for a smooth transition to support total contract operations as proposed and accepted. During the contract transition-in period, the Contract shall at a minimum: obtain all required certifications and clearances, obtain all required personnel security clearances, and attend post-award meetings as required.

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