2_20156881_98747_TP_NULL_0001_NULL_NULL_0001_752_U_N_Y_N_N_Y_D.PDF
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- FA8212-25-Q-0006 F-16 CIRCUIT CARD ASSEMBLY
- Solicitation number
- FA8212-25-Q-0006
About this file
This is an Acceptance Test Procedure (ATP) document for the Enhanced Signal Data Converter (ESDC) Circuit Card Assembly and ESDC Line Replaceable Unit, used in the F-16 aircraft. The document outlines detailed testing requirements including thermal shock testing (-54°C to +85°C), random vibration testing, and burn-in procedures for both qualification and production units.
The ATP requires specific test equipment including DC power supplies, digital multimeters, temperature chambers, vibration systems, and automated optical inspection systems. Key testing specifications include APLA signal accuracy requirements of ±0.031 VDC at 25°C and ±0.050 VDC across all operating environments (-40°C to +55°C), output frequency of 3,200 ± 200 Hz, and warm-up functionality within 0.5 seconds. The document contains detailed procedures for thermal shock cycles, random vibration profiles, and burn-in testing, along with required documentation forms (DSN 1001-1004) for recording test results, inspection reports, and select-at-test component data. The document is controlled under DOD Directive 5230.25 and contains export-controlled technical data.
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20156881
DISTRIBUTION STATEMENT D - DISTRIBUTION AUTHORIZED TO DEPARTMENT OF DEFENSE AND DOD CONTRACTORS ONLY; CRITICAL TECHNOLOGY. 2015-02-26 OTHER REQUESTS FOR THIS DOCUMENT SHALL BE
REFERRED TO 416 SCMS/GUEAA, 6070 GUM LANE, HILL AFB, UT 84056-5819.
WARNING - THIS DOCUMENT CONTAINS TECHNICAL DATA WHOSE EXPORT IS RESTRICTED BY THE ARMS EXPORT CONTROL ACT (TITLE 22, U.S.C. SEC 2751 ET SEQ.) OR EXECUTIVE ORDER 12470. VIOLATIONS OF THESE EXPORT LAWS ARE SUBJECT TO SEVERE CRIMINAL PENALTIES. DISSEMINATION OF THIS DOCUMENT
IS CONTROLLED UNDER DOD DIRECTIVE 5230.25 AND AFI 61-204.
DESTRUCTION NOTICE - FOR UNCLASSIFIED, LIMITED DOCUMENTS, DESTROY BY ANY METHOD THAT WILL
PREVENT DISCLOSURE OF CONTENT OR RECONSTRUCTION OF THE DOCUMENT.
F-16 FINAL
REVISION
STATUS
OF SHEETS
REV
SHEET
REV - - - - - - - - - - - - - - -
SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
ACCEPTANCE TEST PROCEDURE FOR
ENHANCED SIGNAL DATA CONVERTER
Brian Randall 03/16/15
Rodney Gould
N/A
Brian Randall
Michael Laudato
Scott Kingsford
416 SCMS/GUEAA
416 SCMS/GUMAE
AFLCMC/LZPEF
03/17/15
03/17/15
02/20/15
03/06/15
03/17/15
ACCEPTANCE TEST PROCEDURE
Applicable to
Enhanced Signal Data Converter (ESDC) Circuit Card Assembly (CCA) SRU Part No. 201126351-30
Enhanced Signal Data Converter (ESDC) LRU Part No. 201414042-10
Acceptance Test Procedure Document No. 20156881
LIST OF TEST EQUIPMENT
ITEM NO. DESCRIPTION
1 DC Power Supply, Hewlett Packard Model 6267B or equivalent.
2 Digital Multimeter (DMM), Fluke 289 or equivalent (must be accurate to 0.001V).
3 Digital Multimeter (DMM), Fluke 289 or equivalent (identical to Item No. 2) 4 Temperature Chambers, Thermotron Model F-32-CHV-15-15 or F-44-CHV-30-0 or equivalent with JC Systems Controllers Model 620 or equivalent.
5 Vibration System, Thermotron Model DS-640-960-16 or equivalent.
6 Random Vibration Controller, Spectral Dynamics Model SD1700 or equivalent.
7 Temperature Probe and Data logging equipment, NI cDAQ-9178, NI 92117 Module, NI
745691-02 probe or equivalent.
8 Test Box, P/N XECE201100401 or equivalent.
9 Automated Optical Imaging (AOI) System
NOTE: The acceptance tests shall be performed using the equipment specified above or its equivalent. This equipment is specifically designed or selected to provide all power sources, loads, switching and readout displays necessary to assure proper testing of the device.
Calibration shall be IAW MIL-STD-45662.
1.1) SCOPE
This document specifies the Acceptance Test Procedures including thermal shock and burn-in test procedures for the Enhanced Signal Data Converter (ESDC) Circuit Card Assembly (CCA), P/N 201126351-30 and/or the Enhanced Signal Data Converter (ESDC), P/N 201414042-10. The unit shall be tested according to this document when determining if it meets preconditioning requirements specified within this document and on the test data sheets, DSN 1001, DSN 1002, and DSN 1003. The Select-At-Test Component Report, DSN 1004 is also required as part of this Acceptance Test Procedure (See 20156882).
1.2) APPLICABLE DOCUMENTS
USAF, Ogden Air Logistics Drawing
Number 201126351
USAF, Ogden Air Logistics Gerber File Number 201126351-10
USAF, Ogden Air Logistics Drawing
Number 201414042
T.O. 8C11-8-29-3
MIL-STD-45662A
MIL-STD-2164
DSN 1001
DSN 1002
DSN 1003
20156882
Assembly, Printed Circuit Board, Enhanced Signal Data Converter, Drawing
Gerber File, Manufacturing Requirements, Specifications and data.
Modification of, Converter, Enhanced Signal Data, Drawing
Technical Manual, Operation and Maintenance Instructions, Enhanced Signal Data Converter
Calibration Systems Requirements
Environmental Stress Screening Processes for Electronic Equipment
Test Failure and Resolution Report (Engineering Evaluation for Qualification Articles)
ESDC Burn-In Test Data Report
ESDC Inspection Report
Select-At-Test Component Procedure
1.3) DEVICE HANDLING
The ESDC Circuit Card Assembly (CCA) and ESDC Assembly can be sensitive to electro-static discharge (ESD). Unit should not be handled without handler wearing appropriate ground strap. Device should always be stored and transported in a static-free container.
1.4) DATA RECORDING
Detailed data records shall be prepared and maintained on all devices submitted for testing per this procedure. Record all test unit serial numbers and pass/failure data on Test Failure and Resolution Report (DSN 1001), ESDC Burn-In Test Data Report (DSN 1003), ESDC Inspection Report (DSN 1003), and Select-At-Test Component Report (DSN 1004) provided within this procedure.
1.5) FAILURE CRITERIA
A failure shall be determined to have occurred if any qualification unit fails to satisfy the requirements of the THERMAL SHOCK TEST PROCEDURES (Paragraph 2.0, 1 thru 1.1.8) or if any unit, qualification and/or production RANDOM VIBRATION AND TEMPERATURE CYCLES PROCEDURES (Paragraph 2 thru 2.2.10). All Failures shall be analyzed as to cause, documented, and corrective action proposed where applicable. Failure repair and re-introduction to the test cycle shall be as described in paragraph 1.6.
1.6) FAILURE REPORTING
Any failures determined to have occurred during the execution of this ESS procedure shall be reported to 416 SCMS/GUEAA Engineering as follows:
1. FOR QUALIFCATION UNITS:
1.1. Contractor attempting to qualify will fill out a Test Failure Report Data Sheet as outlined on DSN 1001 and email a copy to 416 SCMS/GUEAA within 48 hours of test failure.
1.2. Contractor attempting to qualify will complete a Test Failure and Resolution Report as outlined (DSN 1001) and will submit within two weeks of resolution.
2. FOR PRODUCTION UNITS
2.1. Contractor will accomplish Automated Optical Imaging to ensure all component part numbers and placement is correct.
2.2. Contractor will fill out BURN-IN TEST LOGS as outlined in DSN 1003 and keep them archived for a minimum of 4 years in the event of government inspection.
2.3. Contractor will also complete BURN-IN FAILURE REPORTS and submit them to 416 SCMS/GUEAA within 30 days after completing failed test.
1.7) PRECONDITIONING
Any use of preconditioning ( burn-in, special inspection, subassembly or part conditioning) must also be applied identically to all deliverable equipment (production and spares).
1.8) INSPECTION
ESDC circuit card assemblies shall be inspected to ensure correct component part numbers and placement, solder quality, and manufacturing quality. Use of an automated optical imaging (AOI) system is required to identify incorrect component parts and incorrect placement or orientation. A visual inspection through a microscope of solder quality and manufacturing quality must be performed to ensure solder quality meets standards IAW IPC J-STD-001 and PCB manufacturing quality is free of delamination or defects. Inspections shall be performed per this paragraph, 1.8 and documented in the ESDC Inspection Report, DSN 1003.
1.9) SPECIFICATIONS AND TOLERANCES
See Table 1 for ESDC Testing Specifications and Tolerances.
Table 1 ESDC Testing Specifications and Tolerances
Test Box Shaft Tolerances:
1. Shaft angle tolerance at idle rig point after installation is: +/‐ 0.23°
2. Shaft angle "Stops" location tolerance: +/‐ 0.13°
3. Total angular tolerance of shaft angle at extremes of movement is: 0.23° + 0.13° = +/‐0.36°
RVT Shaft Angles (degrees) vs APLA Signal (VDC):
Degrees VDC
Mechanical Stop: 48.08° 48.08
Cut Off: 46.23° 46.23
Engine Idle (Rig Point): 41.00° (Top) 41.00 12.30
Engine Mil: 18.48° (Middle) 18.48 5.54
Engine Max A/B: 5.00° (Bottom) 5.00 1.50
Mechanical Stop: 2.82° 2.82
4. APLA Signal Transfer Function: Eo = (Ex/Eexc) * 30.15
5. APLA Signal Accuracy and Drift (@ 25°C): Signal shall be within +/‐ 0.031 VDC for all throttle positions.
6. APLA Signal Accuracy and Drift @ all operating environments (‐40 to +55C): Signal shall be within +/‐
0.050 VDC for all throttle positions.
7. APLA Signal Drift shall be calculated by subtracting APLA signal measured at environmental extreme from that of 25°C.
8. APLA output shall drive any load value from 3Kohm to infinity, and 0 to 0.5uF.
9. APLA output ripple shall not exceed 50mVp‐p.
10. APLA output frequency shall be 3,200 ± 200 Hz.
10. ESDC warm‐up shall function within spec within 0.5 seconds after power application.
11. Upon fault detection, APLA output shall provide a 15Kohm path to Aircraft GND.
12. With a 12.3V no‐load output, APLA output voltage shall be >11.76 with a 500ohm load applied.
13. With a 12.3V no‐load output, APLA output voltage shall drop to 0 after the application of a 350ohm load.
2.0) TEST PROCEDURES
1. THERMAL SHOCK (Applicable to qualification units only)
1.1. The SRU shall be subjected to four (4) non-operating (Unpowered) thermal shock temperature cycles in accordance with the following procedure. A maximum of 24 SRU’s may be subjected to screening at one time. If a failure occurs within one of the four (4) thermal shock cycles, the failure shall be reported per DSN 1001, repaired and the test again staring at the first of the required four cycles.
1.1.1. Set one temperature chamber to -54°C and allow chamber temperature to stabilize at -54°C.
1.1.2. Set one temperature chamber to +85°C and allow chamber temperature to stabilize at +85°C.
1.1.3. Place ESDC SRU units as described above in test holding fixtures and place entire setup in temperature chamber set at -54°C.
1.1.4. Allow the units to soak at -54°C for 45 minutes.
1.1.5. Remove the entire setup from the cold soak chamber and place in the temperature chamber set at +85°C. Transfer of SRUs from chamber to chamber must be accomplished within two minutes to ensure that a 30°C/minute minimum temperature transition occurs.
1.1.6. Allow the units to soak at +85°C for 45 minutes.
1.1.7. After completing step #1.1.6 repeat steps 1.1.3 to 1.1.6, five (5) more times for a total of six (6) thermal shock cycles.
1.1.8. Perform RANDAOM VIBRATION & THERMAL CYCLES (step 2) on all test units FAILURE-FREE.
In the event of a failure during RANDOM VIBRATION & THERMAL CYCLES (step 2), the unit shall be repaired and ATP testing will continue at the beginning of the failed ATP test. Failures will be documented and reported in accordance with ESS FAILURE REPORTING procedures in paragraph 1.4.
2. RANDOM VIBRATION & THERMAL CYCLES (Applicable to all qualification units and all production units)
2.1. Burn-In, Random vibration and temperature screening, shall be performed at the line replaceable unit (LRU) level on all deliverable equipment (development, production, and spares). The LRU consists of the ESDC circuit card assembly and cannon plugs placed in the assembly enclosure with lid attached. During the course of the Burn-In, testing data should be recorded and monitored for any unusual behavior using temperature and vibration data logging equipment with the test box throttle in the Middle, 18.48° position. Top, middle, and bottom throttle position data will be recorded as described in steps 2.2.1 thru 2.2.11 and presented in the ESDC Burn-In Test Data Report, DSN 1003.
2.2 Perform Burn-In Test as follows:
The unit under test (UUT) shall be placed on its normal axis (see Figure 3) and subjected to a minimum of two thermal cycles (see Figure 2). The temperature cycling during UUT ESS shall be from -54 to +70°C. During the cooling portion of each cycle, the UUT power shall be off, except for power ON/OFF cycling described below, and chamber air at -54 shall be applied until the area of the EUT with the maximum thermal inertia reaches -40°C. Chamber air at -40°C shall then be applied and maintained until the temperature of the critical components reaches -40°C.
Power shall then be applied to the UUT and the chamber air shall be adjusted to +70°C to initiate the heating portion of the cycle. UUT power on and +70°C chamber air shall be maintained throughout the heating portion of the cycle, which is until the UUT reaches stabilization. UUT power shall be cycled ON and OFF a minimum of three (3) times each at the temperatures of -40°C and +70°C (after UUT stabilization) during each thermal cycle. The period of power ON/OFF cycling per figure 2 shall be of sufficient time to verify instantaneous go/no-go performance. The rate of temperature change during temperature transitions shall not be less than 5°C/minute. The UUT output voltage shall be continuously tested and monitored throughout the heating portion of each thermal cycle and during the power ON portion of the power ON/OFF cycling. Random vibration for Burn-In shall be applied in accordance with the frequency profile in figure 1. Random vibration in accordance with figure 1 shall be applied at the normal axis to the circuit boards for 10 minutes out of each UUT operating hour during the thermal cycles.
2.2.1 Place UUT in chamber mounted on its normal axis. UUT shall be off.
2.2.2 Adjust chamber temperature to 21°C. Record UUT output data IAW DSN 1003.
2.2.3 Reduce chamber temperature to -54 C.
2.2.4 Perform random vibration as detailed in the figure 1 profile for 10 minutes during the 0-30 min test time period.
2.2.5 After dwelling in the chamber for 30 minutes perform 10 min random vibration again during the 30-60 min time period. Record UUT output data IAW DSN 1003 during the 10 min random vibration cycle in the (30-60 min) interval.
2.2.6 After dwelling in the chamber for a total of 1 hour or until chamber has reached -54 C raise chamber temperature to +70 C. Cycle LRU on and off three times while monitoring operation.
2.2.7 Perform random vibration while temperature is rising to +70 C during 60-90 min time period. Turn UUT on.
2.2.8 Allow LRU to dwell at +70 C. Perform 10 minute random vibration at the following time intervals: (90-120 min), (120-150 min), (150-180 min), (180-210 min). Record UUT output data IAW DSN 1003 during the 10 min random vibration cycle in the (180-210 min) interval.
2.2.9 Cycle LRU power off and on three times while monitoring output during 180-210 min time period.
2.2.10 Perform 10 minute random vibration during the 210-240 min time period.
2.2.11 Repeat steps 2 thru 9.
UUT
W1 W0 OA
(g2/Hz) (g’s RMS)
0.0041 0.0286 6.00
Figure 1: Vibration Frequency Profile
Figure 2: Temperature & Random Vibration Profile
Figure 3: Random Vibration Application Axis
ESDC BURN-IN TEST RESULT DATA
Date:
DSN 1002 Vendor:
Test Engineer:
Cycle: 1 2
UUT S/N:
Temperature °C/°F +21/+70 -54/-65 +70/+158 Measured Temperature
RVT Excitation (VAC) (Top, 41°) APLA Out (VDC)
(Top, 41°) RVT Secondary (VDC) (Top, 41°) APLA Out frequency
(Top, 41°) *Calculated (Top, 41°) **Accuracy
(Top, 41°) ***Drift N/A (Middle, 18.48°) APLA Out (VDC) (Middle, 18.48°) RVT Secondary
(VDC)
(Middle, 18.48°) APLA Out frequency (Middle, 18.48°) *Calculated (Middle, 18.48°) **Accuracy
(Middle, 18.48°) ***Drift N/A (Bottom, 5°) APLA Out (VDC)
(Bottom, 5°) RVT Secondary (VDC) (Bottom, 5°) APLA Out frequency
(Bottom, 5°) *Calculated (Bottom, 5°) **Accuracy
(Bottom, 5°) ***Drift N/A
*Calculated = 30.15*(RVT Sec / RVT Exc) **Accuracy = APLA Out - Calculated *Drift = @-54°C (APLA Out @ -54°C – APLA Out @ 21°C), @+70°C (APLA Out @ +70°C – APLA Out @ -54°C)
ESDC Inspection Report Date:
DSN 1003 Vendor:
Test Engineer:
UUT S/N:
PASS FAIL
Optical Verification Solder Quality Manufacturing Quality
SELECT-AT-TEST COMPONENT REPORT
Date:
DSN 1004 Vendor:
Test Engineer:
Measured Temperature (21°C ± 3) =
RVT Excitation (VAC) (7.000 ± 0.100) =
RVT Secondary (VDC) =
APLA Out (VDC) =
Transfer Function, 30.15*(RVT Sec / RVT Exc) =
Error % = 100*(APLA Out - Transfer Function) / APLA Out =
With no-load, set APLA =
12.300 VDC
@3 kΩ Load, APLA =
@350 Ω Load, Does APLA Latch out?
i.e APLA <= 0.600
VDC:
YES
NO
APLA
Out(VDC)=
Component Default Value
Measurement Point Tolerance
Voltage Measured
New Value
New Voltage Measured
R128 392 Ω J2 Pin 1 7.000 VAC ± 0.100
R209 240 Ω U201 Pin 7 J2 Pin 1 VAC ± 0.020
R231 499 Ω J1 Pin 4 30.15*(RVT Sec/RVT Exc) ± 0.031VDC
R215 5.11 kΩ U201 Pin 14 -12.300 VDC ± 0.030
R319 64.9 kΩ U300 Pin 2 12.400 VDC ± 0.150
R308 6.8 kΩ Unit Reset Reset @ 16.00 to
16.25 VDC
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