DO-34125 Tileboards Technical Specification.pdf

DO-34125/EP/CMS

The CMS Detector Phase II Upgrade Project

Technical Specification

Supply of the printed-circuit boards (PCBs) ‘Scintillator Tileboards’ for the High-Granularity Calorimeter for the CMS experiment at CERN

Abstract This Technical Specification concerns the Supply of bare printed-circuit boards (“Scintillator Tileboards”) for the CMS High-Granularity Calorimeter at CERN. The Supply comprises around various boards in trapezoidal shape and with lateral dimensions between around 16cm x 24cm and 38cm x 42cm. All boards must be rigid, halogen-free, approximately 1.3mm thick, and have 8 layers.

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Table of Contents

1. INTRODUCTION TO CERN AND THE PROJECT CMS-HGCAL

1.1 Introduction to CERN

1.2 Introduction to LHC and HL-LHC

2. SCOPE OF THE SUPPLY

2.1 General Description

2.2 Ongoing Verification of J- and K-Board Technology ...................... Error! Bookmark not defined.

2.3 Content of the Supply....................................................................... Error! Bookmark not defined.

3. SPECIFICATION OF THE TECHNICAL DELIVERABLES

3.1 Panels

3.2 Test Coupons

3.3 Design: layer stackup modifications

3.4 Technical Requirements

3.5 Operational and Environmental Conditions

3.6 Identification and labelling

3.7 Options

4. SPECIFICATION OF THE ACTIVITIES

4.1 Activities at the Contractor’s Premises

4.2 Tests

4.3 Site Acceptance Tests at CERN

5. SPECIFICATION OF THE DOCUMENTATION

5.1 Additional Documentation Related to the Supply

5.2 Documentation Related to the Performance of the Contract

5.3 Creation, updating and control of documents

6. APPLICABLE REQUIREMENTS, NORMS AND STANDARDS

6.1 Requirements

6.2 Norms and Standards

7. PERFORMANCE OF THE CONTRACT ................... ERROR! BOOKMARK NOT DEFINED.

7.1 Eligibility Criteria ............................................................................ Error! Bookmark not defined.

7.2 Schedule ........................................................................................... Error! Bookmark not defined.

7.3 Contract Follow-Up and Progress Monitoring ................................. Error! Bookmark not defined.

7.4 Acceptance ....................................................................................... Error! Bookmark not defined.

9. ANNEXE ......................................................................... ERROR! BOOKMARK NOT DEFINED.

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Table of Abbreviations

Abbreviations Definition

DDF Detailed Design File

DMF Detailed Manufacturing File

FAT Factory Acceptance Tests

LHC Large Hadron Collider

HL-LHC High-Luminosity LHC – upgraded collider due to start operation in 2029

MIP Manufacturing and Inspection Plan

SAT Site Acceptance Tests

CMS Compact Muon Solenoid Experiment at CERN

HGCAL High-Granularity Calorimeter Project for CMS at HL-LHC

1. INTRODUCTION TO CERN AND THE PROJECT CMS-HGCAL

1.1 Introduction to CERN

CERN, the European Organization for Nuclear Research, is an intergovernmental organization with over 30 Member States including Associate Member States1. Its seat is in Geneva but its premises are located on both sides of the French-Swiss border (https://maps.web.cern.ch/).

CERN’s mission is to enable international collaboration in the field of high-energy particle physics research and to this end it designs, builds and operates particle accelerators and the associated experimental areas. At present, more than 10 000 scientific users from research institutes all over the world are using CERN’s installations for their experiments. Further information is available on the CERN website: http://cern.ch.

The accelerator complex at CERN is a succession of machines with increasingly higher energies.

Each machine injects the beam into the next one, which takes over to bring the beam to an even higher energy, and so on. The flagship of this complex is the Large Hadron Collider (LHC) (see Figure 1).

Figure 1: CERN Accelerator Complex

1.2 Introduction to LHC and HL-LHC

The LHC will be upgraded between 2026 and 2028 (the third long shutdown of LHC, known as LS3), to provide at least five times more collisions per second than at present. This so-called “High Luminosity LHC” (HL-LHC) phase will begin in 2029 and last for at least ten years. Operation of CMS during the HL-LHC phase poses significant challenges to the detector, particularly in terms of radiation damage and density of particles impinging on the detector elements at any given time –

1 http://home.web.cern.ch/about/member-states https://maps.web.cern.ch/ http://cern.ch/ http://home.web.cern.ch/about/member-states known as “event pileup”. These challenges are particularly crucial for the calorimetry in the forward region, requiring the existing devices to be replaced completely.

As part of its HL-LHC upgrade program, the CMS collaboration is designing and building a high-granularity calorimeter (HGCAL) to replace the existing endcap calorimeters during LS3. The HGCAL comprises two “endcaps”, each divided into 47 metallic layers interspersed with active elements. It is important to note that after the HGCAL is installed in CMS it must operate reliably for at least ten years, with no opportunity to replace any failing components. It is thus critical that all components – including the electronics – are of the highest quality and reliability.

The HGCAL design uses around 4000 large-area (between around 160mm x 240mm and 380mm x 420mm) trapezoidal “Scintillator Tileboards”, each comprising a rigid Printed Circuit Board (PCB) containing soldered active and passive electronic devices, as well as glued plastic scintillator tiles that produce light signals when traversed by high-energy particles. To operate the Scintillator Tileboards reliably after irradiation, and to keep sufficiently low the energy equivalent of electronic noise, the Scintillator Tileboards will be operated at around -30 ºC.

2. SCOPE OF THE SUPPLY

2.1 General Description

The Supply is known as “Scintillator Tileboards” or simply “Tileboards” due to the sensor technology that uses SiPMs and plastic scintillating tiles. It includes high-density routing, locations for standard passive components (connectors, resistors and capacitors) and fpBGA-packaged ASICs with 0.8mm pitch. The Tileboards come in many variants of shape and size, as mentioned in Table 1.

2.1.1 The Scintillator Tileboards

The Scintillator Tileboards are the heart of the very front-end detector modules of the CMS HGCAL scintillator detector. A typical Scintillator Tileboard is shown in Fig. 2. On the sensor side of the tileboard, typically 64 Silicon Photomultipliers (SiPMs) are integrated together with plastic scintillator tiles and the interface connector for communication signals and the Scintillator Tileboard’s power. On the component side, several ASICs are integrated, including 0.8 mm-pitch BGAs. The Scintillator Tileboards contain exclusively SMD electronic components (no through-hole components).

Fig. 2: Component side of a typical tileboard (prototype) with approximate 300mm x 320mm size.

Note that the PCB is not square.

The Scintillator Tileboards will be mounted to copper plates that are actively cooled to -30 oC. In order to allow a good heat contact to the copper heatsink, the flatness of the Scintillator Tileboards is critical at all expected temperatures. In addition, the dimensional accuracy in the PCB production has to be very high to allow - respecting the thermal expansion of FR4 and copper - a precise fit to the mounting holes between Scintillator Tileboard and copper cooling plate. The outer dimensions of the Scintillator Tileboards are of critical importance, because within a detector layer several Scintillator Tileboards will placed next to each other with minimal gaps between them.

The Scintillator Tileboards are 8-layer PCBs with an overall nominal thickness of 1.3 mm ± 0.15 mm.

Only through-hole vias are used (no micro-vias, no via-in-pad, no buried vias), as well as plated and non-plated holes (drillings). The proposed layer stackup is shown in Fig. 3.

Fig. 3: Cross sectional view of a Scintillator Tileboard PCB showing the proposed stack-up

Several sizes of Scintillator Tileboards will be realized, measuring between 165 mm x 240 mm and 380 mm x 416 mm as shown in Table 1. The PCBs must be halogen-free. The impedances shown in Fig. 3 must be realized and controlled by the Contractor. The vias must be open (no cover from solder-stop and no filling with metallic or inert material). The Scintillator Tileboards will have solder-stop (green colour) and silk-screen (printing/labels, white colour) on both sides. The typical lifetime of the Scintillator Tileboards is >15years, because there is no access to the Scintillator Tileboards in the CMS HGCAL experiment after installation – i.e. no repairs are possible. Therefore, a high-reliability production and comprehensive quality control is crucial already at the PCB production site.

2.1.2 Technical Deliverables

The Supply shall include the following technical deliverables and activities:

• Possible design work to modify the proposed stack-up (subject to approval);

2.1.3 Additional activities on the Contractor’s site, as specified in § 4.1

• Tests and test reports (as specified in § 4.2);

• Packing of the Supply and shipping to Fermilab, if so requested (see § 4.1.5);

2.1.4 Documentation as specified in § 5, in particular:

• Detailed Manufacturing Files (see § 5.1.1);

• Factory Acceptance Test report (see § 5.1.2);

• Progress reports (see § 5.2.1).

3. SPECIFICATION OF THE TECHNICAL DELIVERABLES

3.1 Panels

The Contractor(s) shall deliver individual “panels”. Each panel must comprise a single Tileboard and an accompanying test coupon (see below). The Contractor(s) shall fix the Tileboard within the panel by (narrow) tab routing techniques utilizing laser cutting or other suitable means. The Contractor shall mark any Tileboard that fails the tests specified in § 4.2 and, upon request, deliver them to CERN for further examination.

3.2 Test Coupons

The Contractor shall deliver each Tileboard with an accompanying Test Coupon on the same Panel.

The test coupon represents the most critical parts of the Scintillator Tileboard construction:

• Metallization thickness on all layers and in vias;

• Laminate thicknesses (FR4 base material and prepregs);

• Widths of impedance-controlled traces on the signal layers.

The precise form of these test coupons will be defined by CERN and their design provided to the Contractor(s) at the same time as the final design files for the Tileboard variants.

3.3 Design: layer stackup modifications

Subject to prior written approval, the Contractor(s) may modify the material selection for the layer stack-up of the Tileboards provided the specifications and constraints described in § 3.4 are fulfilled, and the chosen materials comply with the material and process requirements outlined in § 3.4.

If the Contractor(s) intend(s) to modify the material selection for the layer stack-up of the Tileboards, it(they) shall provide the proposed new material selection for the layer stack-up design to us in accordance with the schedule in § 7.2.

Start of work on the prototype or pre-production units shall be subject to our prior written approval of such proposed modifications.

3.4 Technical Requirements

All Tileboards must be produced and tested according to the specifications defined in Table 2. The most-critical specifications are highlighted in bold text: these cannot be changed unless with explicit agreement from CERN.

Mechanical Description External size Smallest: 165x240mm²

Largest: 380x416mm² External size tolerance +100µm / -300µm (outer Scintillator Tileboard:

x1+x2 AND y1+y4 in Fig. 4) Thickness 1.3mm ± 0.15mm Number of layers 8

Finished copper thickness requirements External layers 35µm-50µm (final thickness) Internal layers – planes 17µm ± 10% Internal layers – signals 17µm ± 10% Hole (via) wall metallization >=25µm

Board finish requirements Silkscreen on top Yes Silkscreen on bottom Yes Silkscreen colour White Soldermask on top Yes Soldermask on bottom Yes Soldermask colour Green Surface finish ENIG – electroless nickel immersion gold according to IPC-4552 Nickel thickness 3µm minimum – 8µm maximum Gold thickness 0.04µm minimum – 0.125µm maximum

Additional specifications Blind/buried holes (vias) No Micro vias No Vias class 2 derogation No Filled and capped vias No Via holes filled with resin No Minimum hole (via) diameter 0.20mm (final diameter)

Additional specifications Specified stackup Yes Controlled impedance Yes (± 10%) Electrical tests Yes

Test coupons required Yes Exclusively halogen-free materials Yes RoHS compliant Yes

Laminate and copper-foil requirements Base material, when used, shall be flame retardant rated UL 94V-0 laminate glass-fibre epoxy and conform to L94 according to IPC-4101/128, halogen-free. Copper shall be type H with pits and dent, class B. When procuring base material, the following are required: minimum TG 160oC; minimum TD (5%) 350oC; minimum T-288 35min; maximum Z-axis thermal expansion coefficient above TG 280PPM/oC (alternatively Z-axis thermal expansion coefficient between 50-260oC of 3.5% maximum is acceptable) Prepreg material shall conform to P94 according to IPC-4101/128, halogen-free and be subjected to the same requirement set forth for the laminate base material.

All internal layer copper foils shall conform to IPC-4562/2 CU-E3, class 2

Additional plating requirements Finished external layers shall be 35μm-40µm and plated through holes plating shall be >=25μm. The copper plating shall be performed with plating chemistries/processes commensurate with the maximum aspect ratio plated hole in the board.

The quality of the copper plating shall be verified according to IPC-TM-650, 2.4.18.1 as to tensile strength and according to IPC-TM-650, 2.4.2.1 as to ductility.

Thieving may be added outside the circuit board border to compensate for high density areas on the board. For thieving within the borders of the circuit board approval is required.

Vias/through-hole requirements Via drillings must be inside via pad – no breakouts are allowed Negative etchback is not allowed. Positive etchback is permissible to 5µm maximum.

All holes shall be located within a 100µm-diameter of true position. Drilling should be according to IPC-DR- 572.

Via holes and drillings are specified as final hole size.

Additional board-finish requirements Solder mask over bare copper according to IPC-SM-840, class H. All fiducials, lands, vias and holes shall be free of solder mask material.

Silkscreen shall be with permanent, organic, non-conductive and RoHS compliant ink. Silkscreen ink must be capable to withstand peak temperatures of 260-270°C for a duration of 60 seconds and at least 3-4 cycles without discoloration.

An identification marking shall be applied on the PCB. It shall contain the PCB manufacturer logo, UL marking, date-code and surface finish according to J-STD-609. Marking shall be applied on silkscreen at a specified position.

Additional quality-control requirements The printed wiring board, and test coupon when used in lieu of a production board, shall be according to IPC- 2221 and IPC-2222, type 3, class2. Date code and PCB manufacturer logo shall be present on test coupons for traceability.

Acceptance of finished printed boards shall be in accordance with IPC-A-600, class 2.

Fabrication and inspection shall be according to IPC-6011 and IPC-6012, class 2.

The maximum allowable bow and twist shall be 0.75%.

All quality controls shall be performed per IPC-TM-650 procedures and per IPC-4552.

Packing requirements Boards shall be wrapped in sulfur-free neutral PH wrapping paper and shipped in vacuum-sealed anti-static bags.

A humidity indicator and desiccant should be inserted in the bags.

Table 2: Technical specifications for Scintillator Tileboard PCBs

3.5 Operational and Environmental Conditions

The Scintillator Tileboards will be located indoors and must be capable of operating in the following ambient conditions without degrading the performance ratings stated in this Technical Specification:

- At an altitude of approximately 400 metres above sea level, and in the CMS experimental cavern approximately 100 metres below ground;

- In ambient air temperature that varies between –40 °C and + 40 °C;

- In relative humidity from 2 % to 60 %;

- Up to several hundred) temperature cycles between -30°C and +30°C over the course of its expected ~15-year operational period.

3.6 Identification and labelling

The Contractor shall uniquely label, e.g. on the silk screen, or through laser printing or with industry-printable matte or semi-gloss white polyimide Kapton film labels, each delivered Tileboard. The Contractor shall ensure that all accepted and rejected Tileboards and test coupons are easily identifiable. Details, i.e. format and position of the labels will be agreed in writing between the Contractor and CERN prior to the start of the Contract.

To allow traceability, the Contractor shall label the Tileboards along with their test coupon according to the format 320-<TileboardType>-<BBB>-<III>, consisting of:

• <TileboardType>: 4-character Tileboard variant, as specified in column xx of Table 1, e.g. TTTT

• <BBB>: Batch number, defined by the Contractor;

• <III>: a unique number indicating the Tileboard number within the Batch, beginning at “001”.

The Tileboard numbering must be consecutive such that any missing or failed Tileboard is traceable, i.e. missing Tileboards are easily identifiable.

So an example set of labels for TB3_K6C could be the following, assuming batch number “001”:

320TTTT001001

320TTTT001002

320TTTT001003

Etc.

3.7 Options

3.7.1 Optional activity: micro-sectioning and thermal-shock cycling of test coupons and/or Tileboards

As mentioned in § 3.4, no delamination of the Tileboards must occur under thermal shock/cycles.

CERN may request the Contractor to perform the thermal shock/cycles of test coupons if the Contractor is suitably equipped (including through a sub-Contractor).

If requested by CERN, such tests shall be performed by the Contractor at its premises within 60 days from the date of request and the results compiled in a document annexed to the FAT report.

Acceptance of the Supply shall be subject to the successful completion of such test and acceptance of corresponding report in addition to the acceptance procedure detailed in the General Conditions and § 7.3 of this document.

3.7.2 Optional Additional Quantities

If requested by CERN, the Contractor shall provide additional quantities of the Tileboards. The Contractor shall ensure that such Supply complies with the requirements of this Technical Specification and are identical to the accepted Supply.

Acceptance procedure shall be as set out in this present document and complemented by clause 22 of the General Conditions of CERN Contracts. The Contractor shall follow the same procedures as set out in this Technical Specification and in the same order as defined in the Schedule of § 7.2.

The Contractor shall deliver the optional additional Supply according to a schedule agreed-upon by CERN and the Contractor.

4. SPECIFICATION OF THE ACTIVITIES

The Supply shall include the activities listed in the present section. These activities shall comply with the requirements specified below.

4.1 Activities at the Contractor’s Premises

During the Contract validity period, CERN shall have free access, during normal working hours, to the Contractor’s premises, including manufacturing and assembly sites and via the Contractor, to any Subcontractor’s premises. The change of manufacturing place is subject to prior written approval by

CERN.

4.1.1 Design Activities

After receiving the DDF from CERN, should the Contractor(s) consider modifications required, they shall perform the corresponding design activities and submit them to CERN for CERN’s written approval. Such modifications shall be submitted in the Detailed Manufacturing Files (DMF) as outlined in § 5.1.1 and in accordance with the schedule in § 7.2.

Manufacturing of the prototypes (if requested by CERN) and pre-production will be subject to the acceptance by CERN of the DMF should the Contractor(s) modify the DDF.

4.1.2 Prototype production

4.1.3 Pre-production

4.1.4 Series production

4.1.5 Packing and Shipping

The Contractor shall comply with the relevant applicable standards in matters of packing and shipping. In particular, for shipment purposes, multiple stacks of up to 25 Tileboards are permitted provided that each array covered with sulphur-free neutral-PH paper, the stack padded on top and bottom with a rigid material (e.g. MDF plates). Furthermore, the Contractor shall use moisture barrier anti-static packaging with vacuum sealing and desiccant.

4.2 Tests

Without prejudice to any other tests required or that may be required by CERN under the Contract, and in addition to the quality assurance provided by adhering to the standards stipulated in section 3.2, the following tests shall be carried out as specified below.

4.2.1 Tests carried out by the Contractor(s) outside the CERN site – Factory Acceptance Tests The Contractor shall carry out the Factory Acceptance Tests (FAT) at its premises as specified below.

CERN, or a representative of its choice, reserves the right to attend any tests carried out outside the CERN site. In such an event, the Contractor shall notify CERN in writing at least ten working days before the proposed date for any such visits.

The Contractor shall perform the following tests as part of a comprehensive quality control, and provide test reports to CERN:

• Verification of the compliance of the Supply with the DDF;

• Visual inspection_(_§ 4.2.1.1 );

• Dimension measurements_(_§ 4.2.1.2 );

• Electrical tests of the Tileboards (§ 4.2.1.3) and of the Test Coupon (§ 4.2.1.4);

• The micro-sections test, if requested (§ 4.2.1.5).

The Contractor shall compile batch information (for traceability etc.), as well as all the data and test results, in a “FAT report”, to be submitted for written approval together with the delivery of the Supply (see § 5.1.2).

A comprehensive quality control, including test reports, is required from the Contractor. The exact coverage of tests shall be agreed on in later discussions, but must follow at least IPC-6011 and IPC- 6012 class2.

Any board failing any test must be clearly marked as non-compliant.

4.2.1.1 Visual Inspection

In a visual inspection the quality of the Scintillator Tileboard PCB’s surface (quality of open metal contacts, solder-stop layers, alignment of via drillings to metal pads) must be verified by the Contractor. The tileboards shall be checked for any signs of delamination or failed gold plating.

4.2.1.2 Dimensional Tests

The lateral dimensions, flatness and thickness (including thickness uniformity) of the Scintillator Tileboard PCBs are very important and must be measured by the Contractor. The dimension control must provide information for the dimensions x and y (see Fig. 4):

Fig. 4: Dimensions to be measured for quality control on the Scintillator Tileboards.

Dimension control shall be done with respect to the so called “alignment pin”, a drilling of 3.1 mm diameter in the top part of the Scintillator Tileboards. With respect to the alignment pin, the 4 tileboard corners (not the assembly frame) and a fiducial (“x5 and y5” in red colour) shall be measured by the Contractor.

Also the PCB thickness must be verified and documented by the Contractor.

4.2.1.3 Electrical Tests on Tileboards

The Contractor shall carry out standard electrical tests according to IPC-9252 Rev. B based on the netlists provided by CERN. These tests must be performed on all Tileboards.

4.2.1.4 Electrical Tests on Test Coupons

Each set of daisy-chained vias on the Test Coupons should be measured for continuity and resistance.

If the continuity fails or if the resistance is more than 20% of its nominal value the Test Coupon must undergo further tests – such as thermal shock/cycling – at CERN. The Tileboard from the same panel may also require further reliability tests (at CERN or, if requested, by at the Contractor’s site) in order to help determine the extent of the problem, e.g. whether it is limited to the test coupon or affects the entire panel.

4.2.1.5 Micro-sectioning

If requested by CERN, the Contractor shall carry out micro-sectioning and photography of some Test Coupons and, if requested, Tileboards for each production batch (maximum ~1% of production panels), to exclude quality differences between the edge of a panel where the test coupons are located and the centre of a panel where the actual Tileboards are located.

4.3 Site Acceptance Tests at Fermilab

Upon reception, Fermilab will carry out a full cycle of inspection, assembly and functional tests, on the result of which the acceptance will be based:

• The board geometry will be checked for compliance with the soldering mask and optically surveyed in case of inconsistencies.

• A subset of boards will undergo thermal cycling in a range -40 to +40 °C.

• A subset of boards of each type and batch will be assembled with all components except tiles, but including SiPMs and LEDs.

• This allows for a complete test of the electrical functionality, signal integrity and power supply stability for the entire analogue and digital signal chain from the photo-sensor to the digital data output; to be performed directly after the assembly of this subset.

5. SPECIFICATION OF THE DOCUMENTATION

The Supply shall include the documentation related to the Supply (§ 5.1) and the documentation related to the performance of the Contract (§ 5.2). This documentation shall comply with the requirements specified below.

5.1 Additional Documentation Related to the Supply

The documentation related to the Supply shall include:

• DMF as the case may be;

• FAT Reports for the pre-production and series production (see § 7.1.2);

5.1.1 Detailed Manufacturing File

If the Contractor modifies the DDF given by CERN, the Contractor shall submit the DMF including:

• Detailed fabrication parameters: conductor and via plating thicknesses, finished Tileboard size thickness including tolerances, cf § 5.4;

• Layout and dimensions of arrays in Gerber and/or PDF formats, indicating details of the tab routings of the circuits (must include fiducials, tooling holes and shapes on frame and waste rails);

• Layers in a descriptive form, and describing the layers with the appropriate names of production files, fabrication Gerber files and drill/milling files (including paste layer).

If the Contractor decides to modify the Tileboard material selection and/or layer stackup, it shall, before the start of any modification, provide appropriate design files for prior written approval by CERN to verify that the specifications outlined in § 3.2 are complied with, including the following:

• Technology, laminates and material data (datasheets, parameters, layer count, dimensioned stack-up etc.);

• Overall finished board thickness with tolerances and measurement criteria;

• Surface finish (ENIG parameters/thicknesses);

• Calculated differential impedances for edge coupled differential traces running on TOP and on first inner layer (L2) with the second inner layer (L3GND) as reference plane in both cases (see Table 1.

The start of the manufacturing activities by the Contractor shall be subject to prior written approval of the DMF by CERN.

5.1.2 Factory Acceptance Test (FAT) Report

The FAT report shall summarise the manufacturing details and quality-control of each batch, as follows:

For every tileboard:

- Results of the electrical tests described in § 6.2.;

- Documentation of dimensional accuracy verification with sketch of used reference marks for this test according to §6.2.1.2;

- Full details of materials, allowing traceability back to material batches

- Information on applied test and inspection methods;

- EC/EU declaration of conformity;

- Report about impedance measurement of the impedance controlled traces;

- Report of the visual inspection (see §6.2.1.1).

Per production batch:

- Summarized report of the quality control tests and checks containing information of material used. Documentation shall include material certificates of conformity (COC);

- Micro-sectioning report, showing the dimensioned inner structure of the Supply including drilling, hole wall and solder mask;

- Cleanliness assessment along with the associated report, if requested;

- Information on visual, non-destructive measurements and destructive tests during fabrication;

5.2 Documentation Related to the Performance of the Contract

5.2.1 Progress Reports

During the execution of the Contract Fermilab will hold monthly meetings with the Contractor.

During the meetings the Contractor shall provide progress reports for the past-month activities, including all the necessary information, in particular, the actual progress in comparison to the schedule (see § 7.2) as well as the following:

• Quantities included in the batch delivered;

• Expected quantities to be delivered in subsequent batches;

• FAT reports for each delivered batch as defined in § 7.1.2, according to the FAT described in § 4.2.

5.3 Creation, updating and control of documents

The Contractor shall make use of professional standards/codes in matters of document editing, design/drawing process, design reviews and approval, naming conventions and tagging, quality assurance/control.

The documents shall be in English only.

The Contractor shall submit all documents produced in electronic format:

• Drawings in Gerber file (RS274X, 4.3, Abs, metric, leading), Drill file (Excellon 2, 4.3, Abs, metric, leading) or PDF® format;

• Text documents in Microsoft Word® and/or PDF® format;

• Cost breakdowns and equipment lists in Microsoft Excel® and/or csv format;

• Schedules in Microsoft Project®, Merlin Project® and/or PDF® format.

6. APPLICABLE REQUIREMENTS, NORMS AND STANDARDS

The Supply shall comply with Laws. For the purpose of the Contract, Laws shall include all relevant professional and technical norms, standards and rules, and in particular:

6.1 Requirements

All materials used must be halogen free and follow RoHS (EU)

6.2 Norms and Standards

The Supply shall comply with the following IPC specifications:

• Acceptability criteria conforming to IPC-A-600-K (or later) Class II.All communications and documents shall be in English.

Table 5: List of design files

4.3 Site Acceptance Tests at Fermilab

5.3 Creation, updating and control of documents