National Advanced Packaging Manufacturing Program (NAPMP) Advanced Packaging Research and Development (R & D)
Closed Posted
- Opportunity number
- 2025-NIST-CHIPS-NAPMP-01
- Agency
-
National Institute of Standards and Technology
Department of Commerce
- Applications due
- Award size
- Not on record
Opportunity facts
- Assistance listings
- Funding instrument
- Not on record
- Category
-
- Science and Technology and other Research and Development
- Eligible applicants
-
- Other
Opportunity details come from Grants.gov. Updated .
About this opportunity
The National Institute of Standards and Technology (NIST), under the U.S. Department of Commerce, is seeking proposals for research and development (R&D) activities that will establish and accelerate domestic semiconductor advanced packaging. The funding opportunity, titled the National Advanced Packaging Manufacturing Program (NAPMP) Advanced Packaging R&D, focuses on five key areas: (1) Equipment, Tools, Processes, and Process Integration; (2) Power Delivery and Thermal Management; (3) Connector Technology, including Photonics and Radio Frequency (RF); (4) Chiplets Ecosystem; and (5) Co-design/Electronic Design Automation (EDA). Applications are due by December 20, 2024, and full proposals will be requested 60 days after invitation.
Up to $1,550,000,000 in funding is available, with anticipated award amounts ranging from $10,000,000 to $150,000,000 per award over a 5-year period. The funding opportunity is part of the CHIPS for America program under CFDA 11.042 - CHIPS Research and Development, which aims to enhance U.S. manufacturing competitiveness and promote a robust research and development infrastructure in the semiconductor industry.
Synopsis
Applications such as high performance computing and low-power electronics, both needed for artificial intelligence (AI), require leap-ahead advances in semiconductor advanced packaging. This Notice of Funding Opportunity (NOFO) seeks proposals for R & D activities that will establish and accelerate domestic semiconductor advanced packaging through investments in five (5) R & D Areas: (1) Equipment, Tools, Processes, and Process Integration; (2) Power Delivery and Thermal Management; (3) Connector Technology, including Photonics and Radio Frequency (RF); (4) Chiplets Ecosystem; and (5) Co-design/Electronic Design Automation (EDA).
Files
| File | Type | Posted |
|---|---|---|
| CHIPS NAPMP NOFO 2_for publish.pdf |
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