Q A_1.pdf
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- Digital Signal Processing Modules
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- NRL-12-PW14
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| RFI_SOW.pdf |
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RFI NRL-12-PW14
Questions and Answers 1
Q: Presumably there is a minimum FPGA density requirement for a one-channel system (defined as one ADC in, one DAC out). If an offeror has a card with two ADCs in and two DACs out, may it be assumed the required FPGA density would have to roughly double as well? “
A: The draft specifications attempt to address alternate architectures available commercially, which may lead to confusion. Two channels at the full capacity on a single board would not appear practical, thermally for example. We anticipate some capacity compromises should a two-channel architecture be proposed, although this was not articulated in the RFI.
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