National Network for Microelectronics Education Draft Statement of Objectives.pdf

STATEMENT OF OBJECTIVES (SOO)

NSF Project: National Network for Microelectronics Education Program Market Analysis

1.0 Purpose:

The U.S. CHIPS and Science Act of 20221 provides funding to stimulate the resurgence of microelectronics R&D and manufacturing in the United States. A portion of that funding has been appropriated to the U.S. National Science Foundation (NSF) and the U.S. Department of Commerce (DOC) for education and workforce development to address the expected shortage of skilled workers needed by the microelectronics industry. Accordingly, NSF, in partnership with DOC, intend to fund the establishment of a National Network Coordination Hub (the Hub) for the National Network for Microelectronics Education (NNME). This effort will be in alignment with and complementary to the National Semiconductor Technology Center’s (NSTC) Workforce Center of Excellence (WF CoE). The WF CoE is funded by DOC and operated by Natcast, a new purpose-built non-profit entity created to operate the NSTC. With this publication, NSF and DOC are seeking input from interested parties across the nation on a range of issues related to establishing the Hub and the NNME to inform a future funding opportunity.

2.0 Scope or Mission:

NSF and DOC are planning to coinvest in the establishment of the Hub to increase the number and enhance the skill levels of workers needed for employment in the microelectronics industry, as well as expand access so persons of all backgrounds are able to participate in microelectronics jobs. The Hub2 will perform a number of other activities (see Section 4.1 and 4.2 below). After the Hub is established and has effectively managed the initial set of activities outlined in section 4.1, NSF will work with the Hub to establish a number of Regional Nodes that will form the NNME by setting up and operating regional networks composed of participating organizations in the region including colleges and universities; community colleges; trade schools; industry; state and local economic and workforce development agencies; labor organizations; K-12 schools; etc., that would collectively perform activities tailored to the region’s needs (see Section 4.2 below). DOC will invest in other activities to further support education and workforce development aligned with the NNME in the future, as appropriate. The Hub will coordinate key microelectronics education and workforce activities across the nation by cohesively working with the Regional Nodes and the NSTC WF CoE, as well as other investments by NSF and DOC to fulfill the goals and objectives of this program.

1 See: https://www.govinfo.gov/content/pkg/PLAW-117publ167/html/PLAW-117publ167.htm.

2 See: Section 10318: Microelectronics Workforce Development Activities: (b) National Network for Microelectronics Education: (2) ACTIVITIES; of the US CHIPS and Science Act.

https://www.govinfo.gov/content/pkg/PLAW-117publ167/html/PLAW-117publ167.htm

3.0 Background:

A survey by the Department of Commerce’s Bureau of Industry and Security reports that the semiconductor industry directly employs more than 200,000 people in the United States, and 70,000 additional jobs are expected to be added by 2032 fueled by CHIPS Act investments and industry growth.3 Recognizing the need for bold and rapid action, the United States Congress appropriated funds to NSF and DOC to fulfill the demand for additional trained and skilled microelectronics workers. Taking action on this charge from Congress, NSF and DOC have partnered to leverage each other’s strengths to address the microelectronic industry workforce needs at all education levels and for job types ranging from researchers to engineers to skilled technical workers.

As the Federal Government’s leader in promoting STEM education, supporting impactful science and engineering research and development for over seven decades, making strong investments in education, training and workforce development, and having a strong track record in fostering public and private partnerships, NSF is uniquely positioned to fund the establishment of a NNME as mandated in the CHIPS and Science Act.

DOC possesses a unique pulse on industry’s needs given its reach across sectors and industries, and it has distinct leadership in the semiconductor industry, including $39B in CHIPS for America semiconductor manufacturing incentives and $11B in CHIPS R&D investments. This includes funding and overseeing the NSTC which was established to conduct research and prototyping of advanced semiconductor technology and grow the domestic semiconductor workforce to strengthen the economic competitiveness and security of the domestic supply chain. Moreover – as mentioned in Section 1 – the NSTC also houses the WF CoE which will be the trusted center for workforce development for semiconductor companies doing business in America where stakeholders work together to solve the industry’s workforce challenges, help accelerate best practices, and strengthen recruitment and training of the next generation of semiconductor researchers, engineers, and technicians.

With their combined capabilities, NSF and DOC are well-positioned to take action, make joint investments, and build creative public-private partnerships involving industry, academia, federal, state and local governments and local communities around the country aimed at the enhanced education and training of the semiconductor workforce at all skill levels. As part of the development of the Hub and NNME, NSF and DOC expect to coordinate with other federal governmental agencies engaged in microelectronics workforce development activities as appropriate.

Importantly, NSF and DOC seek to ensure the activities in this program are made broadly available and accessible to all interested parties in the community, particularly those groups that are underrepresented in microelectronics industry jobs; employ methods and techniques to recruit and retain increased numbers of people into microelectronics careers;

use effective models to evaluate services provided; and are driven by data and can also reasonably and accurately inform predictions of the numbers of workers needed by industry according to job type, educational level, region and time.

4.0 Program Summary:

3 https://www.bis.doc.gov/index.php/documents/technology-evaluation/3402-section-9904-report-final-20231221/file https://www.bis.doc.gov/index.php/documents/technology-evaluation/3402-section-9904-report-final-20231221/file

This NSF and DOC joint initiative intends to make significant investments in the establishment of the Hub. The possible major activities contemplated for the Hub and the Regional Nodes that will form the NNME are detailed in Section 4.1 below. At a later date, NSF also intends to fund some number of Regional Nodes that together with the Hub will form a significant part of the NNME. The Regional Nodes are contemplated with have the possible major activities detailed in Section 4.2 below. NSF and DOC may pursue other related investments through the Hub in alignment with the goals of the NNME as well.

NSF and DOC welcome comments on these activities and encourage other creative ideas, activities, insights, and approaches that will effectively and efficiently advance the specific programmatic objectives of this program to ensure its success.

4.1 The National Network Coordination Hub:

The major activities to be performed by the Hub include:

1. Coordinate activities across the nation to ensure consistency and synergy across the entire National Network;

2. Develop and maintain a repository of education and workforce development (EWD) resources, including industry-standard curriculum and training resources, and disseminate best practices for effective management of the activities across the country and maximize their societal impacts;

3. Work closely with the NSTC WF CoE to ensure efforts are complementary and not duplicated;

4. Execute a communications campaign to raise awareness of careers in the semiconductor industry;

5. Work with educational institutions, as well as workforce and labor organizations, to identify curricula that are effective and can be scaled;

6. After the Hub is established, work with the individual organizations in the National Network to establish uniform methods for assessment and quantifiable metrics of overall site performance and impact.

7. Establish a public-facing digital portal to share educational digital resources for students and trainees, and teachers;

8. Provide technical assistance to educators and trainers in the semiconductor industry;

9. Provide input to the WF CoE on best practices in curriculum and education, as well as outcomes and data from any workforce efforts the Hub sponsors;

10. Work with the WF CoE to engage, coordinate, and develop partnerships with other centers, facilities, and institutes funded by NSF and DOC and other Federal agencies, as appropriate;

11. Work with the WF CoE to engage, coordinate, and develop partnerships with private sector, non-profits, and international entities, as appropriate;

12. Showcase accomplishments of the National Network to key stakeholders and the general public;

13. In addition to annual reports to NSF, prepare other documents to share with appropriate stakeholders;

14. Satisfy other data collection and reporting requirements as needed to ensure a successful program outcome; and

15. Other activities in support of the mission and goals of the National Network.

4.2 The Regional Nodes:

The National Network, to be developed after the establishment of the Hub, will be coordinated by the Hub and serve as a coalition of regional programs and centers that will catalyze new and existing efforts meant to further prepare individuals for roles in the semiconductor workforce. The Hub will in part execute a competition to select, fund, and oversee some number of Regional Nodes that will serve as a coalition of programs and centers that will catalyze new and existing efforts meant to further prepare individuals for roles in the semiconductor workforce. The rationale for the Regional Nodes is that they would be much closer to the performers and participants, and therefore better able to tailor the activities to the workforce needs in their respective regions.

The Regional Nodes are anticipated to engage in the following major activities:

1. Provide access to microelectronics design and fabrication infrastructure and resources, including design and verification tools, clean rooms, chip fabrication, packaging, testing and characterization facilities, for hands-on training and education. Provision of such resources can be through the cloud and/or facilities within the respective geographic vicinity;

2. Leverage relevant resources at local/state/national EWD organizations;

3. Implement a robust model for providing and tracking trainees’ access to the resources in the region;

4. Develop education and training modules, especially relevant to the geographic region;

5. Facilitate access to and adoption of industry-standard educational, training and research tools, facilities, and resources;

6. Establish and implement training processes for faculty and instructors (train the trainers);

7. Provide experiential learning opportunities such as internships for students;

8. Establish and implement processes to address unique and specific workforce needs in the geographic region;

9. Implement a robust outreach plan for engaging pre-college students and the general public, including support for reskilling and upskilling the current workforce;

10. In collaboration with the Hub, develop creative and effective plans for wide dissemination of educational products and findings;

11. Promote partnerships with and between industry, research and non-research universities, undergraduate institutions, community colleges, and labor organizations in the region;

12. Support effective educational partnerships with Historically Black Colleges and Universities and Minority-Serving Institutions including Hispanic-Serving Institutions, Tribal Colleges and Universities, Predominantly Black Institutions, etc.;

13. Identify and solicit funding opportunities for internships, co-ops, etc., from industry in the geographic region;

14. Establish and implement a robust recruiting plan for increasing faculty and instructors at different levels;

15. Establish and implement a robust recruiting plan for increasing students at different age and education levels, particularly through relevant outreach plans; and

16. Develop specific metrics pertinent to the Regional Node in addition to the National Network’s baseline metrics, and a process for independent evaluation.

5.0 Performance Objectives:

The Hub and eventual NNME should have specific performance metrics. NSF and DOC invite interested parties to provide ideas and opinions about what metrics would be best.

Some possible metrics envisioned for this program include:

• The effectiveness in attracting, preparing, placing, and retaining students in careers in the microelectronics industry for each year of the program and industry’s evaluation of the abilities of employed students to be immediately productive in industry positions.

• The abilities of the performers to develop strong partnerships with industry including co-developing teaching and training programs that will be offered to students and trainees for degree as well as certificate programs.

• The ability for developing industrial funding sources to sustain the National Network operations after CHIPS and Science Act appropriations are fully invested.

• The level of broad dissemination of the capabilities of the National Network to all interested parties in the community, including those groups that are underrepresented in the microelectronics and semiconductor industry.

• The development and use of novel methods and techniques to recruit increased numbers of people, including those from underserved communities, into pursuing semiconductor training, education, and careers, as well as the retention of students and trainees in their pursuit of education and training offered by the National Network.

• The ability to leverage and effectively utilize the nation’s existing and newly established capabilities, facilities, resources and talent funded by the U.S. government, state governments and industry, including: $39B in CHIPS for America manufacturing incentives, the NSTC, and its operator Natcast, CPO and various NSF investments such as the National Network for National Nanotechnology Coordination Infrastructure (NNCI), Chip Design Hub, Engineering Research Centers (ERC), Materials Innovation Platforms (MIP), Materials Research Science and Engineering Centers (MRSEC), and Science and Technology Centers (STC), and other federal government entities.

6.0 Purpose of this Request for Information:

The purpose of this request for information is to conduct market intelligence for information gathering. Specifically, NSF and DOC are soliciting information from interested parties about the NNME as currently envisioned. Respondents are encouraged to offer their own insights on activities that best support the agencies’ goal of creating an education and workforce development ecosystem for training workers for microelectronics employment.

NSF and DOC are also seeking an organization that has the operational nimbleness, capability, and experience to establish, grow, operate the National Network Coordination Hub, and lead the NNME. Specifically, NSF and DOC are looking for an organization that can develop and run the operational infrastructure, manage the day-to-day activities of the National Network Coordination Hub, the future activities of the Regional Nodes and other aligned activities, serve as the main point of contact for NSF and DOC, work collaboratively with the NSTC and other partners, and be a thought partner with the microelectronics industry and NSF and DOC leadership in developing the strategies to ensure maximum success and impact. It is expected that the organization selected will work closely with NSF and DOC leadership in identifying and recruiting organizations to act as the Regional Node performers to help carry out the tasks related to building regional networks.

The Hub should have strong leadership capacity and be equipped to lead the other performers that includes a large array of diverse organizations, including institutions of higher education (IHEs), community colleges, trade schools, preK-12 schools, Federal, state and local workforce development organizations and economic development agencies, industry, labor organizations, and others interested parties.

The selected organization should have appropriate knowledge in education and workforce development as well as familiarity with building teams, networks, and collaborative technologies in fast-paced environments with cross-sector partners. NSF and DOC are especially interested in an organization that includes experience in developing nimble networks and support structures for an ecosystem development.

7.0 Market Intelligence Responses and Attachments

NSF and DOC have broadly defined the composition, capabilities, and goals of the NNME program to provide responders with the flexibility to describe their own views on the program to ensure its success. Indeed, this market intelligence effort is an opportunity for NSF and DOC to hear from prospective proposers as well as the broader community about:

1. PROSPECTIVE VISION AND CAPABILITIES: Please provide your own vision, in up to two pages, for developing a robust, nimble, and ambitious NNME. Include what specific capabilities, resources, experience, networks and activities you would bring to bear in developing the National Network Coordination Hub and the National Network; how you would manage and coordinate education and workforce activities across the nation and in coordination with the NSTC WF CoE; how you will develop regional partnerships among higher education (IHEs), community colleges, trade schools, preK-12 schools, Federal, state and local workforce development organizations and economic development agencies, industry, labor organizations, and industry to create a diverse national microelectronics workforce and ensure education and training are meeting the need of industry; how you would develop and grow local workforce pipelines that include people from underserved communities and align with investments made by industry and the Federal government, including trade and high school training programs, community colleges degrees and certificates, veteran post service opportunities, and mentoring; how you would facilitate partnerships with industry that offer apprenticeships, internships, or applied learning experiences in microelectronics; how you would leverage existing and other new shared infrastructure being established by other Government investments as part of the CHIPS Act to enable applied learning experiences in microelectronics; how you would create and disseminate information to increase awareness of microelectronics education and careers; how you would collaborate with the NSTC WF CoE to coordinate industry and existing public and private organizations including microelectronics education and workforce development activities; and what you think would be the best performance metrics. NSF and DOC also want ideas on how the National Network can be made sustainable after CHIPS and Science Act appropriations are fully invested.

Responses are optional, but will help NSF and DOC gain a better understanding of the universe of organizations capable of and interested in developing a NNME that will effectively and efficiently advance the specific programmatic objectives of the National Network to ensure its success.

2. FEEDBACK: If you have feedback, questions, areas of concern, or suggestions on NNME priority areas as outlined above, this is an opportunity to provide that feedback. You do not need to have plans to submit a future proposal to provide feedback. Please provide feedback on the draft SOO using the Microsoft Excel Template entitled “NSF and DOC RFI Questions Spreadsheet.”

7.0 Market Intelligence Responses and Attachments