Draft Specifications_N00173-26-RFI-KN02.pdf

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Semiconductor Die Bonding and Vacuum Packaging System
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N00173-26-RFI-KN02
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Summary: Specifications for NRL Semiconductor Die Bonding and Vacuum Packaging System

This document contains detailed technical specifications for a federal procurement by the Naval Research Laboratory, Washington DC, requiring an integrated die bonding and vacuum reflow system for semiconductor assembly and packaging operations. The equipment must be provided by a single vendor and installed at NRL-DC location. All respondents must tabulate their responses to each enumerated requirement as either "Meets requirement" or "Does not meet requirement," with failure to provide this information resulting in disqualification.

The die bonding system must feature a minimum 36 x 20 inch working area with automated transfer capabilities for die ranging from 2 x 2 mm to 25 x 25 mm, placement accuracy of ≤5 micrometers (3σ) between substrate and die fiducial marks, and a minimum placement rate of 200 placements per hour. Required capabilities include support for specific Spectrum Semiconductor Materials leadless chip carriers (LCC04442 and LCC08428) and 200 mm diameter silicon wafers, dual-axis vision system for automated alignment, flip-chip (180-degree) bonding capability, and automated epoxy dispensing in dot or line patterns using time/pressure systems. The system must provide pick-and-place force range of 5–5000 grams, Z-axis motion of 2 inches minimum, rotational range of 400 degrees, and motion resolution specifications down to 0.1 micrometers (X/Y/Z axes) and 0.0005 degrees (theta). Optional features include dry vacuum pump provision (Kashiyama Model 15g preferred), 90-degree rotation capability, tip cleaning station, pulsed heat stage for eutectic bonding, and side-mount dual epoxy dispensing system.

The vacuum reflow furnace must accommodate sample mounting plates up to 4 x 5 inches minimum, with operating temperature range from 25°C to 450°C (±5°C accuracy), programmable heating rates up to 4°C per second, and computer/PLC control for vacuum pump-down, process gas refill, and temperature profiling with minimum three settable temperature steps. The system must achieve vacuum pressures of 100 milliTorr or less using dry pump technologies (oil-based pumps prohibited), support process gas refill (argon, nitrogen, or helium) in the range of 1–3000 Torr, and include water-cooled jacket cooling with nitrogen or argon gas purge capability. Optional features include formic acid delivery system with remediation equipment, water-chiller support, 100 AMU residual gas analyzer operable at 100 mTorr–100 Torr, machined tooling for specific chip carriers, and up to 40 hours of process development support with hermetic sealing testing at the vendor facility. The system requires utility compatibility with 208 VAC single/three-phase power, 110 VAC power, ≥80 psi compressed air at ≤65°F, 1 gal/min process chilled water, and liquid/dry nitrogen supply.

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Specifications for NRL Semiconductor Die Bonding and

Vacuum Packaging System

General Requirements

1.1 Scope. The Naval Research Laboratory of Washington, DC (NRL-DC) requires die bonding and vacuum reflow equipment for mounting and package sealing of experimental chips to chip carrier and multi-chip module assemblies fabricated at NRL and by research collaborators. The items may be composed of more than one instrument to allow both die mounting and package sealing functions, but all items are to be provided by a single vendor.

1.2 Installation Site. The vendor shall install the tool(s) at Naval Research Laboratory, Washington DC 20375, at a location to be designated by the Contracting Officer's Representative (COR). The tool is to be compatible with provided utilities: 208 VAC, single and 3-phase electrical power, 110 VAC electrical power, ≥ 80 psi compressed air, ≤ 65F, 1 gal/min process chilled water, and liquid and dry gas nitrogen supply.

1.3 All responders are required to tabulate their responses to all enumerated requirements in this document with either “Meets requirement” or “Does not meet requirement.”

Failure to provide the information is cause for disqualification.

1.4 Items listed as Option will be obtained if funding is available. Responses are required in evaluating the operational performance of the fully configured system.

2. Die Bonding System A die bonding system is required to perform attachment of laboratory-developed patterned semiconductor die to chip carrier and mounting plates for heterogenous integration. (The chip carrier/mounting plate will be referred to as ‘the substrate’ throughout Section 2 of this document.) Substrates and die are to be mounted within an enclosed workspace equipped with robotic vacuum transfer mechanisms to move the die from a carrier pack to the substrate for attachment. Prior to attachment, the system must perform image recording and recognition of critical features such as fiducial marks on both substrate and die, to automatically deliver epoxy bonding material to the substrate, and perform automated carriage of the die to the substrate with alignment accuracies between paired fiducial marks as specified below.

The system must also be capable of flip-chip bonding allowing direct contact of electrical and photonic contacts on chip to a patterned substrate. Bonding is performed with use of epoxy glue to be dispensed by the bonding system or by press mounting to solder metal bumps on the chip and substrate and subsequent reflow heating of the substrate and die.

Specific requirements follow.

2.1 Working area: 36 x 20 inch, minimum

2.2 The system tooling must be capable of automated transfer of die as small as 2 x 2 mm and as large as 25 x 25 mm from arrayed carrier packs to the substrate mounting surface or an array of chip carriers. Capabilities for smaller or larger die are of value for this acquisition. The vendor should explicitly state the die size capabilities of their instrument.

2.3 System tooling must support placement of a variety of substrates including leadless chip carrier packages (Spectrum Semiconductor Materials leadless chip carrier LCC04442 and LCC08428, minimum) and a 200 mm DIA standard thickness silicon wafer.

2.4 Placement accuracy between substrate and die fiducial marks must be ≤ 5 micrometers, 3σ, or less in x and y directions.

2.5 Placement rate ≥ 200 placements/hour, minimum.

2.6 Pick and place force range: 5 – 5000 grams, minimum.

2.7 A calibration load cell is required to perform automated force calibration of the attachment sub-system and for system diagnostics. Measured load cell data must be integrated to robotic system software controls for accurate mechanical loading of attached die.

2.8 Z-axis motional range: 2 inches minimum

2.9 Rotational axis normal to mounting plane (theta)range: 400 degrees, minimum

2.10 Planar repeatability: 0.004 degrees or less, 3σ

2.11 X and Y motional axis resolution 0.1 micrometer or less

2.12 Z-axis resolution: 0.1 micrometer or less

2.13 Theta resolution: 0.0005 degrees or less

2.14 Optical vision system must have a minimum of one look-up camera and one look-down camera interfaced to computer robotic system to allow automated alignment of fiducial marks on substrate and die pieces.

2.15 Option. The vendor will provide a dry pump capable of supporting vacuum requirements of the proposed system. Kashiyama Model 15g are preferred for compatibility with facility standards.

2.16 The system must include flip chip (180 degree) bonding capability to allow direct contact of electrical and photonic contacts on chip to matching contacts on a patterned substrate with accuracy and repeatability specifications previously listed.

2.17 Option. The system must be capable of 90-degree rotation and mounting of die to a substrate under computer control.

2.18 The system must provide automated delivery of a measured dose of epoxy resin to the substrate or die surface prior to mechanical bonding in a dot or line pattern.

Time/pressure dispense systems are preferred.

2.19 Option. The system will provide side-mount dual dispense of epoxy with pump dispenser capable of dot, line and patterned dispense to the substrate surface. Pumps must be included to support full operation.

2.20 Option. The system will include a tip cleaning station to automatically remove residual epoxy after performing dispense steps.

2.21 Option. The system must provide a pulsed heat stage having 50 x 55 mm working surface (minimum) and heating ramp rate of 25C/sec for eutectic bonding. The stage must be equipped with a computer-interfaced controller with temperature profiles configurable by the user.

2.22 The system is to be fully computer controlled. Software must interface to the vision recognition system to identify fiducial or other alignment marks on a die and to provide robotic control of motion system to carry the die to the bond location on a substrate for both normal and flip-chip bonding. It must also implement delivery of epoxy prior to attachment step and control of heaters when implementing eutectic bond attachment.

2.23 The system requires a front-side transparent enclosure to provide isolation of mechanical components and safety while allowing active viewing of bonding steps to operators.

3. Vacuum Reflow Furnace.

A vacuum reflow furnace is required to provide hermetic sealing of chip carriers commonly used in microelectronics. The furnace must accept a variety of lidded chip carriers to a mounting plate, apply vacuum, refill the heated chamber with a process gas to a controlled pressure, provide a temperature-controlled cycle to ramp up for degassing and for solder melt (reflow) and cool down for solder solidification.

3.1 The chamber must be accommodate sample mounting plates up to 4 x 5 inches, minimum, in the thermal work zone.

3.2 Computer and/or PLC control is required to allow programming and control of chamber vacuum pump down, process gas refill, and execution of a system temperature profile that implements 3 (minimum) settable temperature steps corresponding to degas, solder melt, and solder solidify. Chamber venting must also be by computer/PLC control.

3.3 Operating temperature range: Room temperature (25C) - 450C, minimum, accurate to ± 5C of target temperature.

3.4 Heating rate: programmable, up to 4 degrees Centigrade per second, minimum

3.5 Temperature readout should be thermocouple-based with a minimum of two thermocouples inserted to the lower plate of fixture. The second may be placed in a user defined location to monitor temperature during the reflow process.

3.6 Vacuum requirements: the system must be capable of achieving pressures of 100 milliTorr or less, maximum. Vacuum must be obtained through dry pump technologies.

Oil based pumps are not allowed.

3.7 Option. A formic acid delivery system is required to remove oxides prior to reflow to improve bond quality. Remediation equipment must be included to neutralize formic acid before it is exhausted to the facility exhaust system.

3.8 Process gas pressure. The system must be capable of refill of process gas of argon, nitrogen, or helium in range from 1Torr - 3000 Torr, minimum.

3.9 Clearance over target plate: 0.8 inch, minimum

3.10 Cooling of the process chamber is to be implemented with the use of a water-cooled jacket and nitrogen or argon gas purge to allow fast cool-down of chamber and samples.

3.11 Option. A water-water chiller to support Requirement 3.10 is required. Process chilled water having operating temperature of 65F or less, flow of 1 gal/min or greater, is available at the installation facility.

3.12 Process gases inputs: minimum two are required. One process gas will be dedicated to nitrogen. A second will be dedicated to one of the following: helium, argon.

3.13 Option. A 100 AMU residual gas analyzer (RGA) is to be included to allow determination of the chemical makeup of the chamber gas mixture, including oxygen and water radicals.

The RGA must be configurable to operate at 100 mTorr – 100 Torr, minimum.

3.14 A viewport is required to allow viewing of solder reflow process.

3.15 Option. The vendor will provide machined tooling to support end user requirements for particular chip carrier and cover designs. Tooling must support placement of Spectrum Semiconductor Materials part numbers LCC04442 and LCC08428.

3.16 Option. The vendor will provide up to 40 hours (minimum) of process development support in assisting end users to develop reliable reflow recipes. Support can be provided remotely by phone or video-teleconference such as Teams. Vendor will provide testing of hermetic sealing of processes on a test package to be performed at vendor facility.

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