Questions_and_Answers.pdf
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- Attached to
- High-Concurrency High-Performance Computer Systems Federal contract opportunity
- Solicitation number
- 1333ND19QNB640572
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Questions and Answers
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Other files for this federal contract opportunity
| File | Type | Posted |
|---|---|---|
| Revised_Specification_8-28-19.pdf | ||
| FBO-1333ND19QNB640572-CombinedSynopSolicitationRequirementsClauses.pdf | ||
| B02-FBO-1333ND19QNB640572-CombinedSynop-Solicitation_Instructions.pdf |
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Questions and Answers
QUESTIONS:
CPU (Processor specifications)
Q1: Statement of requirements state, “Each CPU shall have memory bandwidth of 341 GB/s and shall be appropriate for HPC applications.”
This must be the performance bench mark for “2 CPU’s” at 341GB/s memory bandwidth. Which would be 2-Socket Theoretical Memory Bandwidth, at 2x 32core processors.
A1: The 341 GB/s memory bandwidth requirement is for both CPUs together. The primary intent of this requirement is to ensure that the systems are well-suited for HPC loads.
Q2: With (2x 32 core processors = 64 Core) running 2x 64 threads = 128 simultaneous independent execution threads. Does this meet the Statement Requirement?
A2: A combination of 2x 32-core CPUs with 2-way hyperthreading for a total of 128 simultaneous threads meets the requirement.
Network (IB-FDR)
Q3: For the IB-FDR network, does 256 to 4Kbyte MTU, 2GB messages meet the IB-FDR Requirement?
A3: The proposed 256 to 4K packet size for 2GB messages is a protocol description, and is acceptable, but does not meet the FDR requirement by itself -- the provided host-channel adapter must also have the FDR speed rating, corresponding to a 14.0625 Gbit/s signaling rate.
Q4: For the IB-FDR network, does NIST need a transceiver cable for the QSFP port for connectivity?
A4: Cabling is not part of this requirement. The deployed systems will use existing cabling.
System Form Factor
Q5: Statement of Requirements state the chassis may not exceed 2U form factor. Be as it may, the total number of High Concurrent High-Performance computer systems listed is 7 + 1 (optional) =8 compute node systems.
Will NIST accept two design configurations, Option #1 ( using 2x 4 node (2U) twin architecture systems)?
Option #2 (7 +1= 8x Individual (1U) systems)?
A5: The form-factor requirement is driven by limitations in overall rack space in an existing facility. Any physical arrangement which uses 2U or less per node (max 14U for 7 total nodes, max 16U for 8 total nodes) meets the requirement. Both of the proposed configurations, dual 2U quads (total 4U for 8 nodes) and (7+1)x 1U (total 8U for 8 nodes) are acceptable.
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