SOW.pdf
PDF 81 KB Posted
- Solicitation number
- 80NSSC24881588Q
About this file
This document is a Statement of Work (SOW) for the development of customized FPGA software to be used in a safety-critical avionics system implementing the Fiber Optic Sensing System (FOSS) technology. The purpose is to procure customized FPGA software to support the development of this safety-critical system, as the current commercial-off-the-shelf (COTS) FPGA software does not meet the requirements.
The key technical requirements include the FPGA software operating in a bare-metal configuration and providing functionality for Housekeeping, Oscilloscope, two-channel ADC signal acquisition, and various communication interfaces. The contractor is required to provide the FPGA code, build instructions, and installation instructions. Additionally, the contractor shall provide basic examples to verify the communication and acquisition interfaces, as well as an example for acquiring more than 16,000 samples per channel.
This effort is being procured by the National Aeronautics and Space Administration Shared Services Center (NASA NSSC) through a sole source contract with INSTRUMENTATION TECHNOLOGIES, ELEKTRONSKA INSTRUMENTACIJA IN PRODUKTI ZA PROCESIRANJE SIGNALOV, D.O.O. under the authority of FAR 13.106-1(b)(1)(i). The NAICS code for this procurement is 334519, and the performance location is at the NASA Armstrong Flight Research Center (AFRC).
View the file
On GovTribe
Work with this file
- Download the original file
- Contacts named in this file
- Similar government files
- Ask GovTribe AI about this file
Text version
Page 1 08/2024
STATEMENT OF WORK (SOW)
GENERAL INFORMATION
1.0 Scope of Work: This document covers the requirements for the customized FPGA software for the safety-critical avionics system using the Fiber Optic Sensing System (FOSS) technology.
2.0 Background: The NASA Armstrong Flight Research Center has long been at the forefront of pioneering advancements in aerospace technology. One of our most promising developments is the FOSS technology. To maximize this potential, we are proposing the development of a safety-critical avionics system centered around the FOSS technology.
The current version of the outer-loop software for this system is in the process of being integrated and tested with the COTS version of the FPGA inner-loop software. Being a COTS product, this FPGA inner-loop was developed with a multi-use customer objective in mind. Because the specific application for which this FPGA will be used does not implement most of the extra included functionality, any unused/dead code remaining cannot be tested, thus not meeting the requirements for safety-critical software. As a result, customized FPGA software specific to this application is necessary.
3.0 Objective: The purpose of procuring the customized FPGA software is to support development of a safety-critical avionics system using the FOSS technology.
CONTRACTOR REQUIREMENTS
4.0 Technical Requirements or Description of the Work: The FPGA software to be provided by the contractor within 3 months of contract acceptance shall operate in a bare-metal configuration and boot from an onboard QSPI chip on the STEMlab 125-14 Low Noise board without requiring the external clock. The software functionality shall include the Housekeeping and Oscilloscope modules and the following interfaces: two-channel ADC signal acquisition, Ethernet, USB, QSPI, SPI, UART, GPIO, SD card, and FatFS. The oscilloscope functionality for the ADC signal acquisition shall support the external trigger capability and external clock, and each channel shall have the ability to store 16,000 samples. The contractor shall provide the FPGA code, along with build instructions to create an application (specifically a BOOT.bin file with FSBL, FPGA bitstream, and application ELF file) using Xilinx Vivado and Xilinx Vitis, and installation instructions for loading the application (BOOT.bin) onto the onboard QSPI flash chip. Additionally, the contractor shall provide basic examples to verify all the communication and acquisition interfaces (ADC, Ethernet, USB, QSPI, SPI, UART, GPIO, SD card, and FatFS) as well as an example showing how to acquire more than 16,000 samples per channel (ex: 40,000 samples per channel).
Page 2 08/2024
5.0 Government Furnished Information: There is no government furnished information for this task.
6.0 Applicable Documents: There are no additional documents that are applicable to the effort to be performed.
7.0 Security Requirements: There are no clearances required.
File details come from the government source that posted it. Updated .