Salient Characteristics - W911QX24Q0207_Redacted.pdf

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Sources Sought for (1) FeFET Crossbar Array Electrical Characterization System
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W911QX24Q0207
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This document is a Salient Characteristics certification for a commercial item request for a FeFET Crossbar Array Electrical Characterization System. The system must enable automated, serial testing of individual FeFET devices in a crossbar array, using 2 SMU channels to apply and measure voltages and currents, and 1 pulse generator channel. Key requirements include a maximum DC current over 100mA, current sensitivity down to 10V, minimum pulse width of 20V, bandwidth over 10MHz, and switching speed over 1000 cycles/second. The system must be based on the PXIe standard, route signals to the array without changing connections, and include software for relay monitoring, switch matrix control, data acquisition, analysis, and test sequencing. This Salient Characteristics document is associated with a Pre-Solicitation for a FeFET Crossbar Array Electrical Characterization System issued by the Department of the Army Materiel Command, Army Contracting Command Aberdeen Proving Ground.

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Salient Characteristics

Commercial Availability Certification:

I have evaluated the commercial marketplace and determined that all of the salient characteristics documented below are available in products/services offered in the commercial marketplace.

Signature (typed name):

Technical Point of Contact (TPOC) or Contracting Officer’s Representative (COR)

The Contractor shall provide one (1) FeFET Crossbar Array Electrical Characterization System that meets the following characteristics:

System Overview Shall enable automated, serial testing of individual FeFET (ferroelectric field-effect transistor) devices arranged in a crossbar array o Shall use 2 SMU (source/measure units) channels to apply drain-source and gate-source voltages, and measure drain and gate currents accurately (source terminal shall be grounded).

o Shall use 1 pulse generator channel to apply pulses with <100 ns (nanosecond) pulse width to the gate electrode o Shall use a switch matrix to route pulses / SMU signals / ground to each FeFET device in the array, sequentially.

Shall be able to electrically connect the terminals of each FeFET device for SMU I-V (current-voltage) testing.

For example, Gate (SMU), Drain (SMU), Source (grounded) Shall be able to electrically connect the terminals of each FeFET device for pulsing to the gate terminal to change the conductance state of the FeFET.

For example, Gate (Pulse), Drain (grounded), Source (grounded)

Shall enable automated, serial testing of individual columns of a FeFET crossbar array to show multiply-accumulate (MAC) functionality o Shall use a switch matrix to connect to multiple FeFET devices concurrently to test MAC operation

Shall have enough concurrent connections for individual columns of a 10x10 crossbar array

Figure 1: Minimum requirement system configuration and context

Figure 2: Minimum requirement switch matrix layout

Figure 3. Example 2x3 crossbar array to demonstrate MAC operation

Chassis / Embedded Controller Shall be based on the PXIe (Peripheral Component Interconnect Express) standard Shall run Windows 10 or 11 64-bit Shall have a Core i7 CPU (central processing unit) with at least 6 cores Shall have 32 GB DDR4 RAM or better Shall have a solid state hard drive, 500 GB or larger Shall have the following connections o GPIB (general purpose interface bus) o Ethernet o USB-C/Thunderbolt o USB 3.0 o USB 2.0 o Display Port or HDMI

Shall house and power all modules listed below, with extra room for at least 5 additional module slots.

SMUs Shall have maximum voltage o >8 V (volts) Shall have maximum DC current o >100 mA (milliamps) Shall have current sensitivity o <10pA (picoamp) Shall be based on the PXIe standard

Pulse Unit Shall have maximum voltage o >10V Shall have minimum pulse width o <100 ns (nanosecond) Shall be based on the PXIe standard

Switch Matrix Shall have the following topologies o Reconfigurable to multiple 4 by XX and 8 by XX topologies o At least 4x128 and 8x64, 1 wire o Shall support matrix expansion

Shall have maximum DC voltage o >20 V

Shall have maximum DC current o >100 mA

Shall have bandwidth o >10 MHz (megahertz)

Shall have switching speed o >1000 cycles/second

Shall have maximum concurrent connections o >20 connections

Shall be based on reed relays for better low-current measurement capability Shall include integrated software for relay monitoring/diagnosis Shall include integrated software for controlling switch matrix connections Shall be based on the PXIe standard Shall route 2 SMU signals, 1 voltage pulse signal, and ground to array without changing physical connections to switch matrix

Software Shall acquire data from PXIe hardware and communicate using industry protocols Shall capture data from PXIe modules without coding Shall perform common mathematical operations on collected data, including curve fitting, integration, differentiation, and statistical analysis Shall create interactive user interfaces for test, monitoring, and control Shall create and edit test sequences Shall integrate or call code written in Python, C/C++ , MATLAB

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