Salient_Characteristics_Hardware_components_1.pdf
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- Attached to
- Notice of Intent Machine Control Hardware
- Solicitation number
- 140G0324Q0160
About this file
This document is a Notice of Intent from the US Geological Survey (USGS) to award a purchase order to United Electronic Industries, Norwood MA for Hardware components that meet specific technical requirements. The USGS requires a control system machine to control, monitor, and record geological experiments, consisting of a chassis with digital input/output, analog voltage output, and analog input with A/D converter boards. The required system must have at least 8 analog inputs, 8 analog outputs, 24 digital I/O, simultaneous sampling at 1 kHz or more, PID control capability for 16 channels, and FPGA capability for high-speed control loops.
The USGS intends to award the purchase order under Federal Acquisition Regulation (FAR) 13.106-1(b) and the procedures at FAR Part 12 for Acquisition of Commercial Items and FAR Part 13 for Simplified Acquisition Procedures. The USGS believes United Electronic Industries is the only source that can provide a compatible machine control system with unique program code developed by the company. Interested parties may submit quotations, but a determination not to compete this action is at the sole discretion of the government. The response deadline is 05/14/2024 at 0800 hrs central time, and submissions must be made via email to rlujan@usgs.gov.
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Text version
Salient Characteristics
The USGS is in need of a control system machine to control, monitor, and record geological experiments.
The machine must consist of a chassis into which digital input/output, analog voltage output, and analog input with AID converter boards can be inserted and customized to fit the lab needs. The system must meet the following technical specifications:
• Channel counts: 8+ analog in, 8+ analog out, 24+ digital IO, all optically isolated with simultaneous sampling on every channel
• Simultaneous sampling Rates: 1 kHz+
• Signal type: Voltage input/output, digital TTL IO
• PID control: Computing power for 16 separate channels of configurable PID control
• FPGA Capability: Must have an FPGA with available fabric to handle high speed control loops
• Custom programing: C++ API with 1 kHz+ polling rates
File details come from the government source that posted it. Updated .