Tab_02_-_Specifications.pdf

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Attached to
FPGA's for Navigation Doppler Lidar Federal contract opportunity
Solicitation number
NNL17636606Q
Issued by
National Aeronautics and Space Administration Langley Research Center

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Instructions,_terms_and_conditions.pdf PDF

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Specifications of FPGA’s for Navigation Doppler Lidar

NASA LaRC has a requirement for three units of a high performance, path to flight field programmable gate array (FPGA).

The items shall meet the following minimum specifications:

In‐system reprogrammable (devices shall not be only one time programmable)

300 MHz clock speed

800 I/O pins

Support the following I/O standards: 3.3 V LVCMOS, 3.3V LVTTL, 1.8V HSTL, 1.8V SSTL, LVDS

Operation over the military temperature range (‐55 °C to +125 °C)

Ceramic package

Directly compatible pinout and footprint with a radiation hardened spaceflight qualified component o The supplied P/N does not have to be spaceflight qualified

Delivery NLT 15 weeks ARO

Qty: 3

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