Attachment 1 Specifications.docx
DOCX document 23 KB Posted
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- Brand Name Only Xilinx Field Programmable Gate Array Federal contract opportunity
- Solicitation number
- NB684030-23-02278R
About this file
This specifications document outlines requirements for the purchase of two Field Programmable Gate Array testing boards by the National Institute of Standards and Technology. The boards must meet minimum specifications including having 930,000 or more system logic cells, 4272 or more DSP slices, 16 or more transceivers, and 8 or more 12 bit ADCs at 4.096 GSPS and 8 or more 14 bit DACs at 6.554 GSPS. The boards must also include integrated memory, expansion connectors, and add-on cards. Delivery within two weeks is required to the specified NIST facility, where inspection including functionality and latency testing will occur within seven business days. A one-year warranty is also required. Payment of 100% will be made within net 30 days of acceptance. This specifications document relates to the solicitation for the brand name Xilinx Field Programmable Gate Array boards.
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Other files for this federal contract opportunity
| File | Type | Posted |
|---|---|---|
| Attachment 2 Provisions for Completion.docx | DOCX document | |
| 02278 RFQ LPTA.docx | DOCX document |
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NIST Specifications Document Purchase two Field Programmable Gate Array Testing Boards Dated 7/14/2023 I. Introduction/Background:
The quantum measurement division explores fundamental aspects of the quantum nature of light and develops applications relating to metrology and other areas of NIST’s mission including development and deployment of the quantum network testbed. As a part of these efforts, NIST develops hardware and software for the fast quantum network control plane that can process quantum and classical signals in real time. To make such control plane fast, low-latency, and real-time detection and synthesis of the digital and RF signals are required. At the same time, high flexibility and reprogrammability of the hardware is required. For this purpose a set of two Field Programmable Gate Array testing boards with RF System-on-Chip (RFSoC) technology is required, to be purchased here.
II. Scope:
The quantum measurement division requires two RFSoC evaluation kits EK-U1-ZCU111-G to start building experimental control plane for the first two nodes of quantum network testbed. Low latency ADCs and DACs with high sampling rates controlled by the same common FPGA chip integrated with a conventional microprocessor and classical optical network connectivity via SFP modules are required to provide nanosecond scale latency control plane and picosecond scale clock synchronization of the quantum network nodes in support of the NIST mission in developing quantum networks.
The choice of a particular evaluation board is due to compatibility of available FPGA firmware and prior evaluation/scientific publication by FermiLab: https://lss.fnal.gov/archive/2021/pub/fermilab-pub-21-472-scd.pdf.
III. Minimum Requirements:
The system shall meet or exceed the salient characteristics identified below. All items must be new. Used or remanufactured equipment will not be considered for award. Experimental, prototype, or custom items will not be considered. The use of “gray market” components not authorized for sale in the U.S. by the proposer is not acceptable. All line items shall be shipped in the original manufacturer’s packaging and include all original documentation and software, when applicable.
Contract Line Item 0001: The Contractor shall provide a quantity of (2) RFSoC evaluation kits EK-U1-ZCU111-G:
General Specifications:
- Ambient operating temperature: 0C-45C
- If electrical power is required for operation, the device should accept a 100-120V 1-phased AC power input or compatible power adapter
- If electro-optical elements (such as SFP/SFP+ modules) need to be exchanged to cover the entire range of operations, this exchange should be straightforward and performable by the end user
- If any software, including drivers, is required for the normal operation and measurements, including extraction of the pulse width, this software should be included
- Communications: The device should be fully programmable, via common computer interface such as USB(UART, JTAG) ports
- Connectivity: SFP/SFP+, USB 3.0, and Ethernet(RJ45)
- 12 months warranty
RFSoC specifications:
- System Logic Cells 930,000 or more
- DSP slices 4272 or more
- Transceivers 16 or more
- RF Data Converters: 8 or more 12 bit ADCs (4.096 GSPS or more), 8 or more 14 bit DACs (6.554 GSPS or more), soft-decision forward error correction (SD-FEC) support
- Memory: integrated 60 Mb or more, DDR4 4GB 64-bit SODIMM, SD-Card support, M.2 SATA connector
- Expansion connectors: FMC-HPC Connector x2, PMOD x2, RFMC 1.0 x2
- Add-on cards: RFMC to 8 SMA ADC inputs, RFMS to 8 SMA DAC outputs
IV. Delivery
Delivery shall be FOB Destination (or equivalent terms, such as INCOTERMS Delivered Duties Paid) are required and shall occur not later than (NLT) 2 weeks ARO.
FOB Destination means: The contractor shall pack and mark the shipment in conformance with carrier requirements, deliver the shipment in good order and condition to the point of delivery specified in the purchase order, be responsible for any loss of and/or damage to the goods occurring before receipt and acceptance of the shipment by the consignee at the delivery point specified in the purchase order; and pay all charges to the specified point of delivery. The contractor shall deliver all Line Items to:
The National Institute of Standards and Technology 100 Bureau Drive, Building 220 Gaithersburg, MD 20899-1640 V. Inspection and Acceptance:
In addition to the inspection and acceptance terms articulated in 52.212-4, the Government reserves the right to perform such performance tests and evaluations as defined below to verify specified system performance. Such tests and evaluations, if performed, shall be conducted within the environment that the system is to be operated. The Contractor has the right to be present during the tests and evaluations, if performed, at the Contractor’s expense.
The scope of general inspection includes:
· Structural, mechanical, and electrical evaluation of product
· An operational evaluation of the product
A visual inspection of the system will be performed by the NIST TPOC to identify defects or any form of indication that the system was damaged during transport to NIST.
Processing and generation of sample analog and digital signals will be performed to verify functionality and latency of the RFSoC The Government shall have sole discretion to require repair or replacement of damaged and/or nonconforming supplies at no cost to the Government. The Government at any time prior to acceptance shall reject the system due to defects and/or nonconformance.
The Government will test, inspect, and accept the equipment on site within 7 business days of the receipt of the tunable picosecond laser. A visual inspection of the tunable picosecond laser will be performed by the NIST TPOC to identify surface defects or any form of indication that the tunable picosecond laser was damaged during transport to NIST. The Government shall have sole discretion to require repair or replacement of damaged and/or nonconforming supplies at no cost to the Government. The Government at any time prior to acceptance shall reject the tunable picosecond laser due to defects and/or nonconformance.
VI. Installation
No installation is required
VII. Warranty The contractor shall warrant the entire system for a period of a minimum of one year after receipt of the equipment and shall be in accordance with terms in FAR 52.212-4
VIII. Payment Schedule The Contractor shall be paid, in accordance with Net 30-day payment terms, upon receipt and acceptance of a proper invoice, in accordance with the following schedule:
1. 100% after installation and acceptance by the TPOC of the fully installed system
2. The Government anticipates inspection will occur upon:
a. After the testing procedures set forth in this document have been completed
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