26-00696 Requirement Specifications.docx

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ARTIQ Hardware
Solicitation number
NB688000-26-00696
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This is a Requirement Specifications document for ARTIQ Hardware components and software enhancements required by the National Institute of Standards and Technology (NIST). The specification details hardware requirements for an experimental control system consisting of multiple integrated components: three EEM AC Power Modules (200W minimum from universal IEC input with Molex MiniFit outputs), one Kasli-5 card, one Kasli-SoC card with integrated CPU for real-time experiment scheduling and synchronization, two DIO-SMA-TTL cards (minimum 8 SMA connections each), one DIO-RJ45-TTL card (minimum 4 RJ45 connections), five Urukul phase-coherent DDS boards (minimum 4 channels each), two Fastino fast DAC boards (minimum 32 channels each), two Shuttler high-speed analog waveform engines (minimum 16 channels each), two Shuttler-AFE analog front-end modules (125 MSPS, minimum 16 channels each), one low-noise DAC Songbird board (minimum 2.5GS/s 16-bit), and one rack-mountable crate with adequate airflow.

The specifications also require development of RTIO event batching functionality for Zynq-based ARTIQ core devices (Kasli-SoC and ZC706) to increase sustained event throughput rates compared to ARTIQ 8.0 and 8.9. The implementation must include a new context manager ("with batch") for ARTIQ-Python, batch transmission of RTIO events upon context closure or explicit method call, integration into the main ARTIQ repository at GitHub, inclusion in the next ARTIQ release, usability through standard installation channels without requiring source compilation, NAC-3 compiler compatibility, and ARTIQ-9 compatibility. The source sought announcement indicates NIST is conducting market research to identify qualified vendors capable of supplying these components, with preference for products manufactured in the U.S., prior to determining acquisition method and issuing a formal solicitation.

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Text version

Item

Quantity
Requirement
EEM AC Power Module
3
EEM card to generate at least 200W from universal IEC input for supplying Artiq system with power. Molex MiniFit outputs.
Kasli
5
Artiq Integrated card to coordinate and drive experimental hardware. Required to: Hold and run the real-time experiment schedule, distribute clocks and perform synchronization, communicate with peripherals, communicate with master (both via ethernet and over fiber with DRTIO).
Kasli-SoC
1
Similarly, Artiq Integrated card to coordinate and drive experimental hardware. Required to: Hold and run the real-time experiment schedule, distribute clocks and perform synchronization, communicate with peripherals, communicate with master (both via ethernet and over fiber with DRTIO). Additionally, it must utilize an integrated CPU to act as a faster control system for the Artiq system.
DIO-SMA-TTL
2
Artiq integrated card to send and receive fast TTL inputs and outputs through SMA connections (at least 8), with precise timing controlled by the RTIO engine synchronized to the RTIO experiment timeline.
DIO-RJ45-TTL
1
Artiq integrated card to send and receive fast TTL inputs and outputs through many RJ45 connections (at least 4 RJ45 connections), with precise timing controlled by the RTIO engine synchronized to the RTIO experiment timeline.
Urukul
5
Artiq integrated, multiple channel (at least 4), phase coherent DDS board that generates precisely timed RF signals for driving AOMs and other frequency sensitive experimental hardware.
Fastino
2
Artiq integrated fast, deterministic multiple channel (at least 32) DAC board for generating precisely timed analog voltages, tightly synchronized with digital and RF hardware.
Shuttler
2
Artiq integrated high-speed, deterministic analog waveform engine. Required to continuously stream or update analog voltage data via spline waveform generation given spline knots. At least 16 channels
Shuttler-AFE
2
Takes the digital output stream from the above and turns it into analog voltages. At least 16 channels, 125 MSPS DAC.
DAC Songbird
1
Artiq integrated, low noise DAC board for generating stable, high-resolution analog tones via differential output. (At least 2.5GS/s 16-bit) Required to continuously stream or update analog voltage data via spline waveform generation given spline knots.
Rack mountable crate
1
Rack mountable crate to hold above EEM cards. Required to allow airflow.

ATRIQ Experimental control system shall contain the following:

Detailed specifications for Ion Storage Group ARTIQ Zynq event batching requisition. Terminology is as defined in the linked GitHub repositories listed below and their associated code and documentation.

Specifications for ARTIQ Zynq event batching

1. Must implement the capability of RTIO event batching for all Zynq-based core devices for ARTIQ (Kasli SoC and ZC706). The event batching means collecting a buffer of RTIO events from the kernel and transmitting them as a batch from the hard processor to the RTIO engine in the FPGA fabric.

2. The batching must result in an increased average sustained RTIO event throughput rate from the hard processor to the RTIO engine in the FPGA fabric relative to that achievable in ARTIQ 8.0 and Artiq-9.

3. Must develop a new context manager (such as “with batch”) to be added to ARTIQ-Python for the user to enable RTIO event batching as described above in relevant kernel sections.

4. All RTIO events within a “with batch” context will be transmitted from hard processor to the RTIO engine in the FPGA fabric as a batch, upon closing of the “with batch” context, or through an explicit method that calls for the transmission of all the currently enqueued batched events without leaving the “with batch” context.

5. All of the above functionalities must be integrated into the main ARTIQ repository at https://github.com/m-labs/artiq, must be included in the next ARTIQ release after their satisfactory completion and testing, and must be usable for ARTIQ installations made through any standard ARTIQ installation channel (not requiring ARTIQ to be built from source).

6. Implementation must work for NAC-3 ARTIQ compiler and have Artiq-9 compatibility.

File details come from the government source that posted it. Updated .