Massively parallel semiconductor development accelerated with machine learning and automated experimentation

The National Science Foundation Division of Electrical, Communications and Cyber Systems awarded Trustees of Dartmouth College $485,757 on October 15, 2026, under the Engineering program (CFDA 47.041) to develop a high-throughput semiconductor device platform accelerating material-process-device co-design through automated experimentation, machine learning, and electrostatic modeling.

The project combines automated experiments with physics-informed machine learning to efficiently explore large design spaces and identify material and processing conditions that produce optimal device performance, stability, and reliability. The experimental work focuses on printable metal oxide materials and solution-processed thin-film transistors fabricated via high-speed flexographic printing to generate large libraries with controlled variation in composition, thickness, and multilayer architecture. High-throughput electrical and optical measurements will characterize device performance. The platform targets semiconductor development for scaled devices, back-end-of-line integrated technologies, sensors, displays, and flexible electronics. Machine learning models will pinpoint origins of device variability and identify defect-related instabilities, while the project develops design principles transferable across semiconductor manufacturing platforms. The project also incorporates student training at multiple levels and integrates research into undergraduate teaching and mentoring to support future semiconductor workforce development.

Place of performance is Hanover, New Hampshire. The period of performance runs through September 30, 2029. Dartmouth College receives the award through its Office of Sponsored Projects Division.

Abstract

This project aims to accelerate the development of semiconductor devices for a range of emerging applications, including scaled devices and back-end-of-line integrated technologies as well as sensors, displays, and flexible electronics. Improving these devices currently requires slow, trial-and-error testing of many different material and design choices. The project will combine automated experiments with physics-informed machine learning to efficiently explore large design spaces and identify which material and processing conditions produce the best performance, stability, and reliability. Although the experimental work will focus on printable metal oxide materials, the broader scientific goal is to develop design principles that can also inform semiconductor technologies based on industry-relevant deposition methods. The project will also use machine-learning models to pinpoint the origins of device variability and identify defect-related device instabilities. In addition, the project will generate practical insights into how device design principles can transfer across semiconductor manufacturing platforms. In addition to its scientific contributions, the project will provide training opportunities for students at multiple levels, help prepare a future semiconductor workforce, and support the integration of research into undergraduate teaching and mentoring. The project will develop a high-throughput semiconductor device platform that integrates automated experimentation, machine learning, and electrostatic modeling to accelerate material-process-device CO-design. The experimental workflow will use high-speed flexographic printing to fabricate large libraries of solution-processed metal oxide thin-film transistors with controlled variation in composition, thickness, and multilayer architecture. High-throughput electrical and optical measurements will generate training data for sequential learning models that use gaussian process regression to predict device behavior and bayesian optimization to guide the selection of new device structures and processing conditions. The project will test the hypothesis that physics-informed machine learning can provide domain-specific insight that improves the efficiency of device optimization, and IT will extend this approach to multiobjective optimization of device performance and stability. The resulting device data will also be benchmarked against semiconducting oxides deposited by industry-standard methods such as sputtering and atomic layer deposition to assess the generality of the derived design rules. The framework will treat reliability, variability, and stability as central device-level metrics and will be used to identify combinations of materials, geometries, and passivation strategies that improve these properties. IT will further apply feature importance analysis to identify the most predictive material and process variables, and IT will use variable-temperature electrical measurements to extract the electronic density of states in order to study interfacial defect concentrations, transport behavior, and stability-limiting phenomena. By combining automated experimentation with physics-informed machine learning, the project will generate design rules that are relevant not only to printed oxide semiconductors, but also to broader classes of semiconductor devices and deposition methods. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the foundation's intellectual merit and broader impacts review criteria.- subawards are not planned for this award.