QA 17 Jan 12.doc

Questions and Answers B-1 Advance Radar/Electronic Warfare Test Station (ARTS)

Request for Proposal (RFP) FA8533-11-R-31160

17 January 2012 The following questions have been received in the WR-ALC/GRVKBB, Major Programs Contracting Office on the above ARTS requirement. The questions as well as the applicable answers are provided below for assistance to all potential offerors for the greater understanding of the Government’s requirement.

Question 1: The latest Revision D to PD10WRGBGBEA34 reduces the LV Parallel discrete I/O (3.2.2.5) from 264 to 0 and Digital Parallel Stimulus/Measurement Capability (3.2.3.7) from 232 to 216 resulting in a total of 216 channels to support the testing of the LRUs.

Many of the LRUs cannot be supported utilizing this low quantity of digital channels especially when monitoring Automatic Ground Equipment (AGE) signals. The station digital sub-system design as a result of the detailed analysis of the LRU I/O and the real-time interactive complexity of the buss structures is directly impacted as a result of the decrease in station channel count required for accurate LRU simulation.

Should the significant increase in additional LV channels needed to meet the LRU simulation testing requirements be included in the station design and price to support LRU testing?

Government Response: The requirements in revision D of the PD in sections 3.2.2.5 and 3.2.3.7 represent the digital capability that is comparable to the existing capability in the R/EW test station (T.O. 33D7-33-195-1). The LRU Simulation Requirements in Section 3.7 (including subsections) requires additional digital capability that is not reflected in sections 3.2.2.5 and 3.2.3.7. Therefore, the total digital capability for ARTS is a combination of those requirements as stated in sections 3.2.2.5, 3.2.3.7, and 3.7 (to include subsections) of the PD.

Each offeror shall ensure that its technical proposal as well as its proposed prices includes the digital capability needed to meet the LRU testing requirements, including LRU simulation, to support LRU testing.

Question 2: PD paragraph 3.2.2.5 has been revised by Amendment 0003 to add a programmable pulse width requirement of 50nS to 500uS. The rise/fall times for the +28VDC and +73VDC signal remain specified as < 1 mS and <2 mS respectively. This is an extremely long rise time for a narrow pulse of 50nS. At +73VDC the signal will be more of a triangle than a pulse. Has the pulse width been specified correctly or is the 50 nS to 500 uS intended to be a resolution requirement?

Government Response: The pulse width has been specified correctly. Please reference paragraph 4-311 of T.O. 33D7-33-195-1 on page 4-37 for the origin of this requirement. The rise/fall times are specified as not to exceed; therefore, the rise/fall shall be less than the specified parameter (i.e. <1 mS or <2 mS). Shorter rise/fall times may be required in order to achieve the required pulse width.

Question 3: PD paragraph 3.2.3.7 has been revised by Amendment 0003 to add the data transfer rate of 10MHz; however, the reception rates specified in table 3.18 are CD to 200 Hz. These requirements seem to contradict each other. Please clarify.

Government Response: The origin of the 10 MHz data transfer rate can be found in paragraph 4-437 of T.O. 33D7-33-195-1 on page 4-49. The “reception” rate for each voltage level as found in paragraph 4-478 of T.O. 33D7-33-195-1 on page 4-52.1 should read “repetition” (not reception). This was verified by reviewing sheet 21 of drawing 3203044 for the LV Parallel pin I/F CCA (drawing attached).

Question 4: Reference: Amendment 0003, PD Specification Rev D, Page 30, top paragraph “I/O channels shall be programmable in input voltage, output voltage, output current and single/differential mod in groups of 8 or less. Channels shall be programmable as input or output in subgroups of 4 or less. The LV and HV parallel channels shall be individually programmable in output voltage amplitude on each channel within the voltage ranges specified in Table 3-18.”

This statement means that current is a programmable function of these discrete, yet there is no mention of programming resolution for current; therefore, we assume that current programmability is only relative when multiple drivers are paralleled to obtain the current required by the load. Please confirm this is the intent.

Government Response: Yes, the assumption and understanding is correct. Programming of the current levels is done in groups of eight (8) drivers. Please refer to the last sentence in paragraphs 4-468 and 4-479 of T.O. 33D7-33-195-1. Also reference the last sentence of section 3.4.4 of drawing 3203044 sheet 21 (drawing attached).