PD10WRGBGBEA34_Rev_D.pdf

PD10WRGBGBEA34, Rev D

CAGE 98752

06 January 2012

PURCHASE DESCRIPTION (PD)

Advanced Radar/Electronic Warfare Test Station (ARTS)

The Revision D to the PD serves to incorporate changed pages:

And to add page 29A, continuation page.

6 January 2012

Parameter Requirement 93 ohm: 19.2 VTRMS

Pulse Width 20 ns to 100 ms

Pulse Width Resolution < 20 ns for PW < 10 µs < 500 ns for 10 µs <PW < 1 ms < 1µs for 1 ms <PW < 100 ms

Pulse Width Accuracy

+ 10 ns + TE* for PW < 500 ns + 20 ns + TE for 500 ns < PW < 10 µs + 500 ns + TE for 10 ns < PW < 100 ms

Channel to Channel Delay 5 ns to 64 Seconds

Delay Resolution

5 ns for Delay ≤ 1 µs 20 ns for 1 µs < Delay ≤ 10 µs 1 µs for 10 µs < Delay ≤ 64 s

Delay Accuracy for 20 ns < Delay < 1 µs, ± 7 ns ± TE for 1 µs < Delay < 10 µs, ± 20 ns ± TE for 10 µs < Delay < 4 S, ± 1 µs ± TE for 4 s < Delay < 64 S, ± 13 µs ± TE

Rise/Fall Time 5 ns to 500 ns, 900 mV Min

Rise/Fall Time Resolution 5 ns for Rise/Fall Time ≤ 100 ns 10 ns for 100 ns ≤ Rise/Fall Time 500ns

* TE = Trigger Error

Table 3-6 Frequency/Time Measurement Requirements

3.2.2.5 Discrete Signal Stimulus. The ARTS shall provide simultaneous, individually programmable analog signal source channels. Each channel shall be capable of generating either a differential or single-ended discrete signal. The discrete channels shall be individually programmable in output voltage amplitude on each channel within the voltage ranges specified in Table 3-7. The 28 & 73 V discrete channels shall be partitioned in groups of 22 or less for amplitude programming.

Logic 1 (+28V or +73V) and logic 0 (0V or <2.5V) shall be individually, independently programmed. The output shall have the ability to be activated and then deactivated to produce output pulses having programmed width of 50 nanoseconds to 500 microseconds. All specified parameters shall be verified at the ICA.

Parameter Requirement 28 & 73 VDC Discretes (Quantity of 88 single ended or 44 differential) +28 Volt Discretes Voltage Level 0 or + 28 VDC (± 1%) Current 140 mA Rise And Fall Time < 1 ms +73 Volt Discretes Voltage Level <2.5 or + 73 VDC (± 2%) Current 1.0 mA Rise And Fall Time < 2 ms

Table 3-7 Discretes Signals

6 January 2012

3.2.2.5.1 Discrete Signal Measurement. (DELETED)

6 January 2012

3.2.3.6 Additional Digital Interface Buses. The ARTS shall be capable of providing communication with the digital buses listed in Table 3-17. All specified parameters shall be verified at the ICA.

Interface Buses Parameter Requirement

RS 232

Operating Mode Transmit / Receive Number of Channels 2 (independently programmable)

Buffer Size Transmitter - 64K words Receiver - 64K words

Baud Rate Programmable from 1200 to 19200 baud 7 or 8 bit data, Programmable start, stop and parity bits

Parity Odd or Even parity

RS 422

Operating Mode Transmit / Receive Number of Channels 2 (independently programmable)

Buffer Size Transmitter - 64K words Receiver - 64K words

Baud rate Programmable from 1200 to 19200 baud 7 or 8 bit, data, start, stop and parity bits

Parity Odd or Even Parity

Table 3-17 Digital Interface Buses

3.2.3.7 Digital Parallel Stimulus/Measurement Capability. The ARTS shall provide, under program control, a minimum of 216 simultaneous LV parallel digital inputs for a threshold detection range of - 12V to +12V. The ARTS shall provide, under program control, a minimum of 24 simultaneous HV parallel digital inputs for a threshold detection range of - 31 to +31V. During single-ended mode, either the Hi and Lo pins of each channel shall be capable of threshold detection.

The Parallel Stimulus/Measurement Capability shall consist of a control subsystem with programmable micro-sequencer operating characteristics. Control and sequencing of test data input and output shall be provided at data transfer rates up to 10 MHz through line-by-line execution of control codes (protocol instructions). Control codes shall be stored locally within the subsystem and initialized by download from the test station host processor.

The Parallel Stimulus/Measurement Capability shall be used for simulation of a variety of parallel digital bidirectional (transmit and receive) buses. Messages to be transferred over these buses shall be stored in a Pattern Memory contained within the Parallel Stimulus/Measurement Capability. Patterns shall be initialized from the test station host processor by download.

6 January 2012

29A

Each output channel of the LV and HV discretes shall be capable of being connected together with other LV/HV outputs for parallel operation in order to achieve currents up to 150mA for LV outputs and 250mA for HV outputs.

6 January 2012

Logic 1 and 0 shall be individually, independently programmed. I/O channels shall be programmable in input voltage, output voltage, output current and single/differential mode in groups of 8 or less. Channels shall be programmable as input or output in sub-groups of 4 or less. The LV and HV parallel channels shall be individually programmable in output voltage amplitude on each channel within the voltage ranges specified in Table 3-18. Two level sets shall be provided per 16-channel group. Each parallel controller’s internal clock shall be externally available at the ICA. A strobe signal shall be available at the ICA indicating when input data is transmitted to the UUT.

At a minimum, each parallel bus controller shall have an externally provided start, gate and sync input at the ICA. Each signal source shall comply with the requirements listed below and in Table 3-18. All specified parameters shall be verified at the ICA.

Parameter Requirement LV Parallel I/O (Quantity of 216) +5 Volt Discretes Differential Voltage Range 0 to +5 V Voltage Accuracy ± 0.1 VDC Programmable Resolution 100 mV Current 150mA Max Rise and Fall Time 50 ns Max Reception Rate DC to 200 Hz ±5 Volt Discretes Voltage Range -5V to +5V Voltage Accuracy ± 1% Programmable Resolution 100 mV Current 50 mA Max Rise and Fall Time 500 ns Max Reception Rate DC to 200 Hz ±12 Volt Discretes Voltage Range -12V to +12V Voltage Accuracy ± 1% Programmable Resolution 250 mV Current 150 mA Max Rise And Fall Time 50 ns Max Reception Rate DC To 200 Hz HV Parallel I/O (Quantity of 24) ±30 Volt Discretes Voltage Range - 31V to + 31V Voltage Accuracy ± 1% Programmable Resolution 100 mV (0-5V), 500 mV

(>5V) Current 50 mA nominal, 250 mA max Rise And Fall Time 500 ns Max Reception Rate DC To 200 Hz

Table 3-18 Parallel I/O Signals