AF_Drawing_9579777A.pdf

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Combat Rescue Helicopter (CRH) Federal contract opportunity
Solicitation number
FA8629-12-R-2400
Issued by
Department of the Air Force Materiel Command Lifecycle Management Center Wright Patterson Air Force Base

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AF Drawing 9579777A

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APPLICATION REVISIONS

NEXT ASSY USED ON LTR DESCRIPTION DATE APPROVED

A REVISED PER ECO 99A0001 1 Jun 1999 D.O.

REV

SHEET

REV A

SHEET 19

REV STATUS REV A A A - - - - - - - - - - - - - - A

OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Distribution Statement A. Approved for public release; distribution is unlimited.

UNLESS OTHERWISE SPECIFIED

DIMENSIONS ARE IN INCHES

TOLERANCES ON

FRACTIONS DECIMALS ANGLES

SIGNATURES ARE ON FILE

ON AF FORM 2602 IN TILAC

APPROVALS DATE

U.S. AIR FORCE

ROBINS AFB, GA

± .XX ± ± DRAFTSMAN

Robert Yohe 12/08/95

TITLE

.XXX ± CHECKER

Edwin Bray 12/08/95

Clarification of Detailed Test Criteria

MATERIAL ENGINEER

Edwin J. Reid 12/11/95

For Electrical and Avionics Items

PROJECT ENGINEER

TREATMENT

None

PROJECT AUTHORITY

Donald Looney 12/11/95

SIZE

A

A.F. CODE IDENT NO.

98752

DRAWING NO.

9579777

FINISH

None

RELEASE AUTHORITY

David Olson 12/11/95

SCALE

None

REV A SHEET

ENGINEERING DRAWING LAYOUT A VERTICAL

CAGE 98752 DWG NO. 9579777 REV. A SHEET 2

TABLE OF CONTENTS

Paragraph Description Page

1. Scope 3

2. Minimum Data Requirements for Input Conditions 5

3. Minimum Data Requirements for Output Measurements 11

4. Cables, Minimum Data Requirements for Multiconductor and RF 19

5. Quality Assurance Provisions 20

CAGE 98752 DWG NO. 9579777 REV. - SHEET 3

1. SCOPE: The purpose of this document is to provide Clarification of Test Criteria for Electrical and Avionics Items. Criteria shall be furnished for all electrical assemblies/ subassemblies to ensure their functional integration without recourse to special test equipment (STE) or installation of the assembly/sub-assembly into a next higher assembly (NHA). Criteria required by this attachment shall be specified in a separate document or on the top drawing of the assembly/subassembly to which the criteria apply. Criteria shall be provided to completely describe all input and output conditions and measurements required. All input, output, and return connections shall be specified.

1.1 Specific situations differing from those described herein shall follow the principles outlined herein and shall be so specified that the input, output, and testpoint conditions are completely defined.

1.2 The specification of A-C voltages shall include a notation of root-mean-square (rms), peak, or peak-to-peak and shall always include frequency. Percent distortion shall be included when significant.

1.3 Normally, pulse width measurements shall be specified at the 50 percent level. When deviation from this is required, the amplitude level shall be identified.

1.4 Rise and fall times shall normally be specified between 10 percent and 90 percent levels. When deviation from this is required, the amplitude levels shall be specified.

1.5 Spikes, overshoots, noise levels, and D-C levels shall be identified and illustrated.

1.6 Waveforms shall include a sync signal reference if possible.

1.7 Resistance measurements involving semiconductor devices shall include polarity requirements and the current at which the semiconductor impedance was determined.

1.8 Measurements that require longer than the standard measurement delay for stabilization after input insertion or other action shall be so noted on the individual test specification sheets.

1.9 If a specific test parameter requires the measurement of several characteristics, such as rise time, fall time, and pulse width, and the replacement action for an out-of-tolerance condition for these characteristics is identical, then all of the measurements should be specified as one test document.

1.10 It is recognized that certain comp onent failure or degradation may not be readily detectable during performance testing, such as failure of power input filters and relay coil noise suppressors. The test document shall include tests to ensure that all such items are checked and failures is olated.

1.11 Input/output test requirements shall be specified for each item/component instead of at interface hardware test points.

1.12 Standard engineering terms, symbols (per IEEE STD 91-1973), abbreviations (per MIL-STD-12), and designations (per IEEE STD 315-1975) shall be used in the test document.

1.13 Stimuli that vary in discrete or incremental steps shall be specified in lieu of continuously variable stimuli if possible. The steps specified shall be as large as possible.

1.14 The addition of external feedback loops to the item/component to simulate the environment in which it normally operates shall be avoided and open loop tests made whenever possible. The external interconnection of elements on the item/components shall be avoided when these elements can be individually tested.

1.15 All test points specified on the detailed test information sheet shall be identifiable on the item schematic.

1.16 If a test point and connector pin are electrically common, the connector pin shall be used if it is accessible.

CAGE 98752 DWG NO. 9579777 REV. - SHEET 4

1.17 Only the power and stimulus required to perform a test shall be applied during the test. If adherence to these requirements will cause an active device on the item/component to be partially powered, it is permissible to add the power necessary to fully power the service.

1.18 It is understood that some characteristics of the item/components may not be critical, i.e., any value within a specified range can be used for test purposes. An allowable range shall be specified for these noncritical characteristics instead of the specific value. If an output characteristic is a function of an input characteristic for which a range is specified, then the relationship between the input and output characteristics should be specified. An example of the above would be the test of a linear amplifier. The input voltage amplitude 3 is a noncritical characteristic and might be specified as 0-10 volts. The output voltage, since it is a function of the input voltages, would be V out - 5 in. (assuming an amplification of 5).

1.19 Complex output waveform shall be avoided whenever possible. The complexity of an output waveform can frequently be reduced by the proper selection of the input signals and still permit adequate testing of the item/component. A number of simple waveform tests is preferable to one complex waveform test.

1.20 The requirement for electrical interface shall be held to a minimum. As an objective, the electrical interface shall consist of only a cable that interconnects the item/component and the test equipment. The use of external circuitry or loads in test shall be avoided where possible in order that the above objective can be met.

1.21 Item/component loads shall be specified in terms of impedance required.

1.22 When a test requires stimuli with tolerances of less than one percent, the possibility of using a ratio (output to input) test shall be considered. If a ratio test could be used, the additional information necessary to conduct a ratio test shall be specified in the supplemental data section.1.23 Time or phase-dependent relationships, if applicable, shall be defined using diagrams as needed. If the exact value of an input or output is not known, a range shall be specified.

1.24 Individual test requirements such as signal conditioning, loads and impedance matching terminations shall include nominal values, power ratings, voltage standing wave ratio (VSWR), etc. Complex loads shall be specified in standard engineering units.

1.25 All characteristics of each waveform shall be included. Some characteristics may not have apparent relevancy but shall be included for clarification. Only the characteristics to be checked shall appear in the measured value data section of the "Detailed Test Information" sheet; all others, in the supplemental data section. Each waveform (except sine waves) shall be described in pictorial illustrations. Nonrepetitive waveforms shall be identified.

1.26 Tolerances for every characteristic shall be specified. The upper and lower tolerance limits shall be described in the same units as the characteristic. Such terminology as "less than" or "greater than" shall be avoided when significant high or low limits can be specified. The expressions "open circuit" and "short circuit" may be used if defined.

1.27 The output impedance at the test point(s) with respect to the signal return(s) and the impedance seen by the item/component inputs shall be specified for all tests.

1.28 Any critical or unusual test requirement not self-evident elsewhere shall be defined. Such requirements might include susceptibility to noise or transients, time delays before making measurements, signals, and power lead characteristics, etc.

1.29 All adjustments that may correct a no-go condition or optimize a critical parameter shall be defined.

1.30 When more than one component is to be identified for possible replacement, they should be listed in their most probable order of failure.

CAGE 98752 DWG NO. 9579777 REV. - SHEET 5

2. MINIMUM DATA REQUIREMENTS FOR INPUT CONDITIONS

2.1 POWER SUPPLIES

2.1.1 D-C Power Supplies

a. Must specify: Units:

(1) Nominal voltage Volts ac (rms, pk-to-pk, etc)

(2) Voltage tolerance +/- Volts or %

(3) Current Amperes

(4) Current tolerance (variance) or % impedance of load on power supply in terms of R=JX

(5) Load impedance R + JX ohms

b. Specify if critical: Units:

(1) Ripple Volts rms

(2) Noise Volts pk-to-pk

c. Specify load changes if not adequately covered above. Critical transient response is a typical example. (Magnitude and tolerance)

2.1.2 A-C POWER SUPPLIES

a. Must specify: Units:

(1) Nominal Voltage Volts ac (rms, pk-to-pk, etc)

(2) Voltage tolerance +/- Volts or %

(3) Nominal frequency Hz

(4) Frequency tolerance Hz or %

(5) Current Amperes

(6) Current tolerance (variance) %

(7) Voltage unbalance Volts or %

(8) Load impedance R + JX ohms

(9) Current unbalance Amperes/phase

b. Specify if critical to item/component

Distortion Maximum %

(1) Phase-to-phase angle Degrees

CAGE 98752 DWG NO. 9579777 REV. - SHEET 6

(Magnitude & tolerance)

(2) Phase-to-reference phase Degrees (Magnitude & tolerance)

2.2 SIGNAL INPUTS (ANALOG)

2.2.1 SINUSOIDAL INPUTS

a. Must specify: Units:

(1) Voltage/power magnitude Volts/watts, dB

(2) Voltage/power magnitude tolerance Volts, %, watts, dB

(3) Frequency Hz

(4) Frequency tolerance Hz or %

(5) Load impedance R + JX ohms

(6) Offset Level Volts

b. Specify if required

(1) Modulation

(a) Modulation type

(b) Modulation frequency(ies)/rates

(c) Modulation percentage or waveshape

(d) Carrier power/voltage level during modulation on/off ratios

(e) Modulation pulse shapes

(f) Pulse repetition frequency

(g) Swept frequency

(h) Center frequency

(i) Width of sweep

(j) Sweep rate

(2) Noise levels

(3) Maximum VSWR

(4) Phase angle to reference

CAGE 98752 DWG NO. 9579777 REV. - SHEET 7

2.2.2 PULSE INPUT

a. Must specify: Units:

(1) Amplitude Volts

(2) Amplitude tolerance Volts/%

(3) Pulse repetition frequency Hz

(4) Pulse repetition frequency tolerance Hz or %

(5) Pulse width (50% amplitude) Seconds

(6) Pulse width tolerance Seconds or %

(7) Pulse rise time (10% to 90%) Seconds

(8) Pulse rise time tolerance +/- Seconds

(9) Pulse fall time (90% to 10%) Seconds

(10) Pulse fall time tolerance +/- Seconds

(11) Pulse mode Continuous, single pulse, etc.

(12) Load impedance R + JX ohms

(13) Load tolerance +/- (R + JX) ohms

(14) Offset from zero Volts

b. Specify if required

(1) Synchronization characteristics stating above parameters for reference signal(s) plus timing data between signals

NOTE: A timing diagram should be included if more than two signals must be simultaneously synchronized

(2) Modulation of pulse trains or continuous pulses

2.2.3 SYNCHRO AND RESOLVER INPUT

a. Must specify: Units:

(1) Three-wire synchro or four-wire resolver

(2) Frequency Hz

(3) Frequency tolerance Hz or %

(4) Stator voltage Volts

CAGE 98752 DWG NO. 9579777 REV. - SHEET 8

(5) Stator voltage tolerance Volts or %

(6) Angular output Degrees

(7) Angular output tolerance Degrees

(8) Load impedance R + JX ohms

(9) Load unbalance R + JX ohms

(10) Reference signal X

(a) Amplitude Volts

(b) Amplitude tolerance Volts or %

(c) Maximum current Amperes

2.2.4 WAVEFORM INPUT TO ITEM/COMPONENT (OTHER THAN PULSES)

a. Must specify: Units:

(1) Waveshape, description of type

(2) Amplitude Volts pk-to-pk

(3) Amplitude tolerance Volts or %

(4) Offset from zero Volts

(5) Offset tolerance Volts

(6) Load impedance R + JX ohms

(7) Period and tolerance Seconds

(8) Duration and tolerance Seconds b.. Specify if required

(1) Synchronization:

(a) Timing relationships

(b) Reference signal amplitude

(c) Reference signal ris e time

(d) Reference signal width

(2) Modulation:

(a) Carrier characteristics

(3) Symmetry

CAGE 98752 DWG NO. 9579777 REV. - SHEET 9

2.2.5 TIME DELAYED INPUTS

a. Must specify: Units:

(1) Delay period Seconds

(2) Delay period tolerance Seconds

(3) Characteristics of time reference signal

(a) Amplitude

(b) Rise time

(c) Width

(d) Source impedance of item/component

(4) Characteristics of delayed signal

(a) Amplitude

(b) Rise time

(c) Width

(d) Load impedance

2.3 SIGNAL INPUTS (DIGITAL)

2.3.1 SERIAL DATA INPUTS

a. Logic "0" voltage and current

b. Logic "1" voltage and current

NOTE: Current course and sink requirements shall be stated

c. Logic "0" voltage tolerance

d. Logic "1" voltage tolerance

e. "0" state load impedance (R + JX)

f. "1" state load impedance (R + JX)

g. Bit prf (clock rate)

h. Bit width

i. Bit rise and fall time (min/max)

j. Synchronization requirements - reference signal from item/component or external

(1) Amplitude

CAGE 98752 DWG NO. 9579777 REV. - SHEET 10

(2) Width

(3) Rise time

(4) Pulse repetition frequency

(5) Source impedance

k. Word length: Total number of bits

l. Pattern of bits expressed as "1" or "0" format

m. Simultaneity with other serial or parallel digital inputs

NOTE: Include timing diagram if more than two simultaneous input channels are required.

2.3.2 PARALLEL DATA INPUTS

a. Logic "0" voltage and current

b. Logic "1" voltage and current

NOTE: Current source and sink requirements shall be stated.

c. Logic "0" voltage tolerance

d. Logic "1" voltage tolerance

e. "0" state load impedance (R + JX)

f. "1" state load impedance (R + JX)

g. Logic format: Return to zero, non-return to zero, etc

h. Word rate (prf)

i. Bit width

j. Bit rise and fall time (min/max)

k. Number of words in sequence

l. Pattern of bits expressed in "1" or "0" format

m. Simultaneity with other serial or parallel digital inputs

NOTE: Include timing diagram if more than two simultaneous input channels are required.

n. Synchronization requirements - reference signal from item/component or external

(1) Amplitude

(2) Width

(3) Rise time

CAGE 98752 DWG NO. 9579777 REV. - SHEET 11

(4) Prf

(5) Source impedance

2.4. PRESSURE INPUT

a. Must specify: Units

(1) Absolute pressure in. Hg, psi

(2) Absolute pressure stability

(a) Short term in. Hg/min, psi/min

(b) Long term in. Hg/hr, psi/hr

(3) Absolute pressure tolerance in. Hg, psi

(4) Maximum volume cu. inch

(5) Leakage rate cu. inch/min

(6) Maximum rate of absolute pressure change in. Hg/min, psi/min

(7) Range of rate of absolute pressure in. Hg/min change

(8) Absolute pressure rate tolerance in. Hg, psi

(9) Absolute pressure change in. Hg, psi

b. Specify if required

(1) Pressure rate of change in. Hg/min

3. MINIMUM DATA REQUIREMENTS FOR OUTPUT MEASUREMENTS

3.1 SIGNAL OUTPUTS (ANALOG)

3.1.1 D-C VOLTAGE

a. Must specify: Units

(1) Magnitude and polarity +/- Volts

(2) Magnitude tolerance +/- (volts or %)

(3) Impedance of item/ component signal source R + JX ohms

(4) D-C offset of return from "0" volts Volts

CAGE 98752 DWG NO. 9579777 REV. - SHEET 12

NOTE: For ratios of d-c signals, the above data shall be provided for each signal plus the nominal expected value of the ratio and its tolerance.

3.1.2 A-C VOLTAGE ITEM/COMPONENT (rms)

NOTE: This section refers to sinusoidal signals whose average value over a period is zero when referenced to the d-c offset.

For signals not meeting this criteria, refer to waveform measurements (paragraph 3.1.7).

a. Must specify: Units:

(1) Frequency of signal Hz

(2) Magnitude Volts rms

(3) Magnitude tolerance +/- (Volts or %)

(4) Impedance of item signal source R - JX ohms

(5) D-C offset of return from "0" volts Volts

NOTE: For ratios of a-c signals or a-c/d-c signals, the above data shall be provided for each signal plus the nominal expected value of the ratio and its tolerance.

3.1.3 PHASE ANGLE BETWEEN SIGNALS FROM ITEM/COMPONENT

a. Must specify: Units:

(1) Frequency Hz

(2) Frequency tolerance +/- (Hz or %)

(3) Amplitude (2 signals) Volts

(4) Amplitude tolerance +/- (Volts or %)

(5) Expected angle Degrees

(6) Expected angle tolerance Degrees

(7) Source impedance of item/component R + JX ohms

(8) D-C component(s) Volts

3.1.4 FREQUENCY OF SIGNAL

a. Must specify: Units:

(1) Expected frequency Hz

(2) Expected frequency

CAGE 98752 DWG NO. 9579777 REV. - SHEET 13

tolerance +/- (Hz or %)

(3) Amplitude Volts

(4) Amplitude tolerance +/- (Volts or %)

(5) Impedance of item/ component source R + JX ohms

NOTE:

(a) For microwave signals, specify waveguide.

(b) For coaxial, so indicate.

(6) Polarity (non-sinusoidal) +/-

(7) Rise time (non-sinusoidal) Seconds

(8) Width (non-sinusoidal) Seconds

(9) D-C offset from "0" volts Volts

(10) Maximum shunt capacitance, if other pf than coaxial connection, that is acceptable.

3.1.5 PERIOD TIME OF SIGNAL(S)

(a) Must specify: Units:

(1) Expected time Seconds

(2) Expected time tolerance Seconds

(3) Amplitude(s) Volts

(4) Amplitude(s) tolerance Volts

(5) Polarity(ies) +/-

(6) Impedance of item/ component source(s) R + JX ohms NOTE: If coaxial, so indicate.

(7) Edge(s) used as reference(s) & slope(s) Leading or trailing

(8) D-C offset from "0" volts Volts

(9) Rise time (non-sinusoidal) Seconds

(10) Width (non-sinusoidal) Seconds

(11) Maximum shunt

CAGE 98752 DWG NO. 9579777 REV. - SHEET 14

capacitance, if other pf than coaxial connection, that is acceptable.

3.1.6 POWER (average rf)

a. Must specify: Units:

(1) Amplitude Watts

(2) Amplitude tolerance +/- (Watts, %, dB)

(3) VSWR Ratio

(4) Frequency (normal) Hz

(5) Impedance of item/ component source R + JX ohms

3.1.7 WAVEFORMS

3.1.7.1 PULSE AMPLITUDE MEASUREMENTS

a. Must specify: Units:

(1) Expected amplitude Volts pk

(2) Expected amplitude tolerance +/- (Volts or %)

(3) Frequency (rate) Hz

(4) Frequency (rate) tolerance +/- Hz

(5) Impedance of item source R + JX ohms

(6) D-C offset from "0" volts Volts

(7) Polarity +/-

(8) Synchronization signal, if available - Same data as above for signal to be measured

NOTE: For pulses containing components that cross through "0" volts, a sketch of waveform shall be required for definition.

3.1.7.2 Pulse rise/fall time measurements

a. Must specify: Units:

(Same as pulse amplitude measurements plus)

(1) Expected rise/fall time Seconds

(2) Tolerance Seconds

(3) Slope of measure edge Positive or negative going

CAGE 98752 DWG NO. 9579777 REV. - SHEET 15

3.1.7.3 Pulse width measurements

a. Must specify: Units:

(Same as pulse amplitude measurements plus)

(1) Expected width Seconds

(2) Expected width tolerance Seconds

(3) Measured at 10%, 50%, or 90% amplitude

3.1.8 RESISTANCE MEASUREMENT

a. Must specify: Units:

(1) Expected value Ohms

(2) Expected value tolerance Ohms

b. Specify if required:

(1) Current flow through unknown

3.1.9 DISTORTION OF SIGNALS

a. Must specify: Units:

(1) Waveshape

NOTE: If other than sinusoidal, distortion criteria shall be defined.

(2) Fundamental frequency Hz

(3) Fundamental frequency tolerance Hz

(4) Impedance of items source R + JX ohms

(5) Amplitude Volts rms

(6) Amplitude tolerance Volts rms

(7) Expected percent distortion %

(8) Expected percent distortion tolerance +/- %

3.1.10 SYNCHRO/RESOLVER SIGNALS

(1) Identity

CAGE 98752 DWG NO. 9579777 REV. - SHEET 16

(2) Voltage Volts

(3) Voltage tolerance Volts

(4) Frequency Hz

(5) Frequency tolerance Hz

(6) Expected angular position Degrees

(7) Expected angular position tolerance Degrees

(8) Impedance of item source (Line to Line) R + JX

3.2 PRESSURE OUTPUT

a. Must specify: Units:

(1) Static or differential

(2) Expected value in. Hg

(3) Expected value tolerance in. Hg

3.3 SIGNAL OUTPUTS (DIGITAL)

3.3.1 SERIAL SIGNALS

3.3.1.1 Logic levels verification

a. Must specify: Units:

(1) Logic "0" voltage Volts

(2) Logic "0" tolerance Volts

(3) Logic "1" voltage Volts

(4) Logic "1" tolerance Volts

(5) Impedance of item source

(a) "0" State R + JX

(b) "1" State R + JX

3.3.1.2 Bit patterns evaluation

a. Must specify: Units:

(1) Bit rates

(2) Bit rise and fall times

CAGE 98752 DWG NO. 9579777 REV. - SHEET 17

(3) Bit width

(4) Logic level

(5) Currents source and sink

(6) *Synchronization requirements

(a) Reference signal

(b) Amplitude

(c) Width

(d) Rise time

(e) Pulse repetition frequency

(f) Source impedance

(7) *Expected bit pattern/word - Expressed in "1" or "0" format

(8) *Simultaneity with other item/component outputs

NOTE: Include timing diagram if more than two simultaneous input channels are required.

*Normally a separate test of the same data, as required.

3.3.1.3 Propagation delay

a. Must specify: Units:

(1) Bit/pulse characteristics as in logic level verification and bit pattern evaluation above

(2) Expected delay Seconds

(3) Expected delay tolerance Seconds

3.3.2 PARALLEL SIGNALS FROM ITEM/COMPONENT

3.3.2.1 Logic level verification

(Same as required for serial signal logic level verification)

3.3.2.2 Bit pattern evaluation

a. Must specify: Units:

(Same as required for serial signal bit pattern evaluation)

3.3.2.3 Propagation delay

(Same as required for serial signal propagation delay)

CAGE 98752 DWG NO. 9579777 REV. A SHEET 18

3.3.2.4 Loads and networks for item/component

3.3.2.4.1 Electronic elements

a. Must specify: Units:

(1) Impedance of load R + JX ohms

(2) Tolerance on load +/- (R + JX) ohms

(3) Frequency characteristics, if required

(4) Power rating - average peak Watts/vars

(5) Nonlinear characteristics, if required

NOTE: Complex loads shall be specified in standard engineering units.

3.3.2.4.2 Mechanical elements

a. Must specify as required:

(1) Angular position

(2) Spatial position

(3) Inertia

(4) Torque

(5) Rpm

(6) Pneumatic/hydraulic factors

(7) Other

4. CABLES, MINIMUM DATA REQUIREMENTS FOR MULTICONDUCTOR AND RF

4.1 Multiple conductor cables (not coaxial) require a dielectric withstanding voltage test, mechanical pull test, and vibration test.

4.2 RF cables require the following:

a. Electrical:

(1) Frequency – VSWR – Insertion Loss

(2) Impedance

(3) Dielectric withstanding voltage

(4) Operating Voltage

(b) Mechanical:

(1) Minimum bend radius

(2) Outside diameter max

(3) Dielectric construction and material

(4) Center conductor (material)

CAGE 98752 DWG NO. 9579777 REV. A SHEET 19

(5) Outer jacket (material)

(6) Jacket color

(7) Operating temperature range

(8) Pull test

(9) Vibration

4.3 Notes:

a. The dielectric test (withstanding voltage) is performed for the purpose of determining the ability of component parts to withstand a potential at sea level or at a specified altitude. The potential is normally above rated voltage and simulates momentary overpotentials due to switching, surges, and other similar phenomena. Although this test is often called a voltage breakdown or dielectric strength test, the intention is not to cause a breakdown of the insulation or to detect corona, but to determine whether insulating materials and spacings in the component are adequate.

b. The purpose of the cable pull-out test is to determine the axial tensile load which can be applied to connectors and the holding effect of a connector when subjected to inadvertent axial tensile loads. The tool or method shall not deform or damage the assembly.

c. Vibration testing is performed to determine the resistance of equipment to vibrational stresses expected in shipment and application environments.

4.4 Restrictions:

a. Wiring whose jacket or insulation material that contains Polyvinyl chloride (PVC) or other potentially corrosive elements shall not be used for Air Force aerospace equipment. This encompasses multiconductor cable, internal hookup wire, and interconnection cable and wire. Use of PVC in any other application requires prior approval from this office, identified in block 6 of the DD Form 1423 which calls out this requirement.

b. MIL-W-16878 shall not be used for Air Force aerospace equipment.

c. Wiring whose jacket or insulation material that contains Aromatic polyimide film shall not be used.

5. QUALITY ASSURANCE PROVISIONS

5.1 RESPONSIBILITY FOR INSPECTION. Unless otherwise specified in the contract or purchase order, the contractor is responsible for the performance of all inspection requirements (examinations and tests) as specified herein. Except as otherwise specified in the contract or purchase order, the contractor may use its own or any other facilities suitable for the performance of the inspection requirements specified herein, unless disapproved by the Government. The Government reserves the right to perform any inspections which are deemed necessary to ensure conformance to prescribed requirements.

5.1.1 RESPONSIBILITY FOR COMPLIANCE. All items shall meet the requirements of this document. The inspection set forth herein shall become a part of the contractor's overall inspection system or quality program. The absence of any inspection requirements in the specification shall not relieve the contractor of the responsibility of ensuring that all products or supplies submitted to the Government for acceptance comply with all requirements of the contract.

Sampling inspection, as part of in-process reviews, is an acceptable practice to ascertain conformance to requirements; however, this does not authorize submission of known defective material, either indicated or actual, nor does it commit the Government to accept defective material.

File details come from the government source that posted it. Updated .