Secure Packaged Microelectronic Components, Printed Circuit Boards, and Supporting Technologies
Closed Special Notice Posted
- Solicitation number
- W52P1J26R0001
- Agency
-
Department of the Army
Department of Defense
- Responses due
- Set-aside
- No set-aside
Opportunity facts
- NAICS code
- 541715 Research and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)
- Place of performance
- United States
- Points of contact
Notice details come from SAM.gov. Updated .
About this opportunity
The U.S. Army Combat Capabilities Development Command Aviation and Missile Center (DEVCOM AvMC), Redstone Arsenal, Alabama, is conducting market research through a Request for Information (RFI Reference W52P1J26R0001) to identify domestic suppliers, designers, and manufacturers of secure packaged microelectronic components, printed circuit boards, and supporting technologies for current and future Department of Defense systems, with responses due September 16, 2026, at 5:00 PM Central Daylight Time.
The RFI seeks capability and technical information across seven technology areas: board-level security (microelectronic components and portable soft IP integrated with COTS devices across modular open systems architectures such as 3U/6U OpenVPX/SOSA); package security (specialized packaging for multi-chip modules or systems-in-package utilizing COTS or bespoke security components); enhanced secure boot (portable soft IP for enhanced security applications); secure components (purpose-designed chiplets or ASICs providing enhanced trust); multi-chip packaging (advanced techniques providing inherent component security); emerging technologies (novel techniques, materials, and processes compatible with modern manufacturing); and other related technologies. Technologies of interest must demonstrate a current Technology Readiness Level of 4 with a clear path to TRL 6 and beyond, compatibility with domestically available industry-standard microelectronic design and packaging processes, and robust performance in operational DoD environments.
Responses must follow a structured seven-section format including technology areas addressed, technical description with design or test data, manufacturing compatibility, capability statement, data and IP rights clarity, and cost and schedule information including ROM pricing at Low Rate Initial Production and Full Rate Production quantities, nonrecurring engineering costs, and development schedules with key phases. Responses are limited to 10 pages maximum (excluding cover page), must use 11-point font or greater with 1-inch margins, and must be submitted in PDF format through PIEE at https://piee.eb.mil. Small businesses, non-traditional defense contractors, and teams are encouraged to respond. Questions must be submitted through PIEE Q&A no later than seven days before the submission deadline.
Notice text
2 versions
Update #2 · Latest ·
Information Requested: The U.S. Army Combat Capabilities Development Command Aviation and Missile Center (DEVCOM AvMC), Redstone Arsenal, AL is conducting market research to identify domestic products, suppliers, designers and manufacturers of advanced protection architectures, systems, components, and other technologies for packaged microelectronics intended for deployment into current and future military systems of interest to the Department of Defense (DoD). This RFI is seeking information from suitable vendors/vendor teams related to the following Technology Areas:
1. Board-level Security: Capabilities spanning microelectronic components and portable soft IP integrated with commercial-off-the-shelf (COTS) devices across modular open systems architectures (MOSA) form factor systems (e.g., 3U/6U OpenVPX/SOSA, 3U/6U SpaceVPX, VNX, and smaller).
2. Package Security: Specialized microelectronics packaging configurations or designs for multi-chip modules (MCMs) or systems-in-package (SIPs) which utilize COTS or bespoke security components that are intended to provide additional security to underlying components.
3. Enhanced Secure Boot: Portable soft IP that can be used in conjunction with COTS microelectronic components to provide additional security for enhanced secure boot applications.
4. Secure Components: Purpose-designed microelectronic components (chiplets, ASICs, etc.) that are intended to provide enhanced trust/security for co-packaged microelectronic components.
5. Multi-chip Packaging: Advanced microelectronics packaging techniques that inherently provide additional component security or could be easily adapted to provide additional microelectronic component security.
6. Emerging Technologies: Novel techniques, materials, and processes that are compatible with modern microelectronic manufacturing/packaging methods that can provide additional security to packaged microelectronic components.
7. Other: Technologies, methods, and processes not mentioned above that are compatible with modern microelectronics design, manufacturing, and packaging techniques and able to provide enhanced security to packaged microelectronic components.
For additional details refer to the Attachment, R2.0_SS_RFI_SUBMISSION_v1.2.
Update #1 ·
Refer to the Attachment, R2.0_SS_RFI_SUBMISSION_v1.2.
Files
| File | Type | Posted |
|---|---|---|
| R2.0_SS_RFI_SUBMISSION_v1.2.pdf |
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