intro to the analq184.pdf

cw07/11/01

THE RLB UPGRADE MODIFICATION

NOTE: The field units are looking for basic explanations of what is contained in the RLB mod, as well as information on palette compensation.

This could be done in a writing style similar to the guided tour.

Recommend that the paper be laid out something like this outline:

Overview.

The Reprogrammable Low Band (RLB) upgrade modification is a reliability, maintainability, and performance improvement to low band and also provides some performance improvements to mid/high band. This modification is made with minimal changes in hardware.

It has been projected that the RLB upgrade will save the USAF approximately $56 million over 20 years.

The reliability of the AN/ALQ-184(V)11 compared with the (V)7 is improved by 17% and the maintainability, Mean Time To Repair (MTTR) of the low band improved by 40%. All of the quaternary word, rotary switches, and most of the pot adjustment are gone.

At the Organizational level the RLB upgrade Allows low band programming to be selected at the flight line rather than sending the pod back into the intermediate level shop.

There were four total changes made that constitutes the change from an AN/ALQ-184(V)7/8 to an AN/ALQ-184(V)11/12 :

(a) Basic RLB upgrade removes twelve old PWAs, five from the A1A2A2 card cage and seven from the A2A2A2 card cage and replaces them with two new PWAs located in the A1A2A2. Removes the LC subband dual modulator. Deletes the requirement for pod operation with the C-6631 control Indicator Unit (CIU).

(b) The A1A2A2 Card Cage Improvement provides a better card cage design that will be more resistant to fluid intrusion and provide additional 120 pin growth card connectors.

(c) The low band drive control relocation. Provides easy access to the drive control and the video amplifier. This eliminates any requirement for removal of the A2 coldplate assembly for test and alignment. There are reliability improvements, maintainability improvements and performance improvements associated with this change.

(d) ECP 98-01. Provides a performance improvement by moving the MB1subband quadrature modulator to MA subband.

(e) The mid/high band IBIT subband receiver test hit limits were changed from 40

- 255 to 40 – 511. This should eliminate false errors seen in flight but not verifiable in the shop.

See figure 1 for the physical areas of change to the (V)7 pod.

• Add wires for Encoder/ Decoder requirements (run silent, etc)

• Remove LC dual modulator and return to AF inventory

• Change coax cables to move MB1 quad mod to

MA

• Modify System Control harness and

WWD A3A2A5

• Modify TG harness and WWD A3A2A2

• Remove cable assy, card cage, and 7 PWAs

• Add new cable assembly

• Relocate Drive Control and ancillary items from coldplate (A2A1)

• Remove harness assembly with 5 PWAs

• Add harness assembly with 2 PWAs

• Improve fluid intrusion resistance and add additional PWA slots

Figure 1. AN/ALQ-184(V)11 Pod New and Modified Equipment Arrangement

System Changes.

(a) The AN/ALQ-184(V) pod will no longer operate under the control of the C-

6631 CIU.

(b) The Low band is no longer controlled by button 1 and button 6 of the C- 9492 CIU. Low band is controlled the same as mid/high band.

(c) C-9492 CIU low band activity lights have been added that indicate if the LA or LB subband(s) are programmed in the selected mode. Button S1LL indicates the status of subband LA and S1LR indicates the status of subband LB.

Subband active – lamp on. This indication is also available on the ASE CSTU.

Certain BIT failures will result in the extinguishing the affected subband(s) lamp(s).

(d) C-9492 CIU Mission Data Classification is now shown by S5LL. When the lamp is illuminated the active MD is Training, when it is extinguished the active MD is Combat. This indication is also available on the ASE CSTU.

(e) Run Silent mode of operation has been added turn off low band when commanded and the wiring for mid/high continued to the interface of the A2/A3 sections for future growth. Note that the low band run silent is fully functional.

(f) Dither for mid/high band KO is now programmable through MD. The basic sawtooth wave form has been changed to a triangle wave form. The frequency of the triangle wave has been reduced by a factor of two to keep the slope of the waveform the same. If you are looking at the dither signal and MD has not loaded into low band yet you will se a default frequency that is approximately two times that of the programmed value from MD.

(g) Removal of the LC subband dual modulator will reduce the power supply loading, in particular the 12 volts, and provide a possible spare during the field kit installation. The LC dual modulator was not being used and still provided a possible failure to the pod.

(h) Replacement of the twelve low band PWAs with two new PWAs provides the technician with a simpler system to troubleshoot and test. The two new PWAs are a Low Band Interface (LBI) PWA A1A2A2A12 and a Low band Controller (LBC) PWA A1A2A2A13.

The LBC PWA contains the TI 32 bit processor that is clocked at a 20MHz rate, Static RAM for a scratch pad memory, ROM containing the processor

BOOT, and two 5,000 gate Field Programmable Gate Arrays. See Figure 2 LBC Block Diagram.

DONE, INIT-

DIN, PROG-

CCLK

16 bits

24 bit Add Bus

32 bit Data Bus serial data/cntrl

DOUT

Processor

20MHz Clock

SRAM

U2 Xilinix

U1 Xilinix

PROM

24 bits data

To/From

PSP

RLB

Reset-

21 bits

LBI

PWA

RLB I/O

Serial data

Figure 2. Low Band Controller PWA Block Diagram

The two Xilinx ic’s (U1 and U2) contain the specialized circuitry for low band and some mid/high band functions. Both U1 and U2 are volatile and must be reloaded at each power-up. The schematics for U1 and U2 take up 22 A-size pages reflecting amount of circuitry resident. The connection information is contained in a special PROM-Sequencer chip located on the A1A2A2A12 LBI PWA and serially clocked in until U1 and U2 are filled. Each chip asserts a DONE signal and a DONE0 indicates that both U1 and U2 have been properly loaded. If a failure to load properly occurs, the load process will restart. Just for information on how fast this technology is progressing, we are presently using Xilinix chips with 250,000 circuits.

U1 contains the following major functions:

Address Decoder (U1ADRDEC block) Serial I/O (SERIO block) Clock Synchronization (CLKSYNC block) Dither Generator (DITHS2 block) 5 X 1 Multiplexer UX5_1 block) hundreds of individual flip-flops and buffers

Figure 3 shows a simplified top level diagram of the U1 Xilinx. In the upper left is the XBUS I/O which is 16 bits wide. Data being received is sent through the top line, through the buffers as XDATA[15:0]. The XDATA is sent through type D flip-flops where it is buffered as SYS_CONT[15:0] The following table shows the individual SYS_CONT signals:

BIT SIGNAL PIN

SYS_CONT15 LB#VCOCONT[2] 124

SYS_CONT14 LB#VCOCONT[1] 21

SYS_CONT13 LBVCOCONT[2] 18

SYS_CONT12 LBVCOCONT[1] 15

SYS_CONT11 LAVCOCONT[2] 101

SYS_CONT10 LAVCOCONT[1] 95

SYS_CONT9 FILTER_ON 148

SYS_CONT8 RLBSTBY+ 115

SYS_CONT7 ALLFT+ 89

SYS_CONT6 S5/LR- 87

SYS_CONT5 S1/LL- 85

SYS_CONT4 S1/LR- 79

SYS_CONT3 HEATER_ON 78

SYS_CONT2 HELIX_ON- 77

SYS_CONT1 COLLECTOR_ON- 76

SYS_CONT0 HVPS_ON- 75

Figure 3. Top Level Diagram, U1 Xilinx

A bus is indicated in the schematic by” “ and the brackets indicate he size and number. For example “ [31:0] “ indicates 32 signals lines, “[15:13]” indicates three lines; 13, 14, and 15.

Figure 4 shows a simplified diagram of the U2 chip and the following functions.

CPU interface Clock generator U2 control Technique Generator Many individual buffers

The CPU Interface function provides XBUS address and data routing.

This function also does the address decoding. The XBUS connects the two Xilinx chips, U1 and U2, on a common bus.

The Clock Generator receives a 20MHz input which it divides down into 10MHz and 5MHz clocks as well as a buffered 20MHz output.

The U2 Control determines when the Xilinx configuration data has been successfully loaded and produces the DONE signal.

The most complex function in the U2 is the technique generator which contains four sub-functions; Waveform Generator, DMA Interface, Modulation Interface, and Noise Mux. All low band techniques are generated within these four sub-functions.

Prior to U1 and U2 being loaded by the Low Band Interface (LBI) PWA with the approximately 27K bytes of configuration data on power-up, the boot PROM brings the processor up and configures its I/O ( see Figure 2).

The LBI PWA, see Figure , provides the digital to analog conversions to drive the low band components, the Xilinx configuration program, and discrete logic.

U7 is a phase accumulator whose six digital inputs from the Processor PWA are converted to a voltage that is used by U6 to generate the three dither signals; HCKOVCO to VCO 9, MKO DITHER and HKO DITHER. The dither waveform is a triangle wave vs. the saw-tooth used in previous variants. DAC U6 also provides a 0 to +3vdc output, LMODCONT, that controls the input attenuator in the low band transmitter drive control.

Figure 4. Top Level Diagram, U2 Xilinx

Figure 5. LBI PWA Simplified Schematic Diagram

The second DAC, U4, Generates the 0 to +10vdc signals to the low band channelizer’s LA and LB dual modulators. U14 generates the strobes and chip selects from the four address lines, RLBMOD_A0-A03 and the data strobe

RLBMOD_DST-.

U1 is the PROM-Sequencer that configures the Processor PWA two Xilinx chips. When the Processor asserts INIT- as true and DONE0 is false the serial data, SDAT0, is clocked out by the CCLK. Once DONE0 is asserted true the Prom-Sequencer halts.

The LBI PWA also buffers and converts many of the low band transmitter signals. Some of the signal are provided as two inputs to inverts and “ OR’ed’ providing a redundant input which improves the reliability of the signal since either input could fail and the function would still work correctly. The RLBCPUOK- signal is used to ensure that if the Processor CPU fails its BIT test that it will inhibit the low band transmitter.

A simplified diagram of the U18 PAL is shown in Figure 5. The RLBFLT input is buffered and sent out as the ALLFT+ signal to the A3A2A5. The inverted output, S8/UL- is sent to the A1A1 Encoder PWA. The RLBFLT signal has a pull-up (not shown) that was put in to ensure that the low band Fault lamp would be on initially until loading is complete and IBIT has been run. You will not this on the 9492 CIU or CSTU.

DONE0 is buffered and the drive level increase as RLB_DONE in order to guaranty its reliable operation being sent the A3A2A5 section. mid and high band fault are also buffered before being sent to the A1A1 Encoder PWA.

Low band fast switch modulation and blanking controls are provided by U18. In previous variants the A3A2A5 sent only blanking signals. RLB added modulation capability and the signals are “ANDed” in U18.

The three transmit signals ; XMT1-, XMT2-, and XMT3- are logically combined to provide OPER+ as true when any of the XMTx- signals are asserted low.

U11 is a level shifter that provides an interface between he A3A2A5 Serial I/O and the low band Processor. Since the serial I/O is an RS-232 (RS2TXD and TS2RXD) the level must be converted to TLL compatible signals for the low band Processor.

(i) Relocation of the drive control, driver output directional coupler, crystal detector, video amplifier from the A2A1 section to the A2A2 section provides several benefits. The relocation re-uses the space where the old A2A2A2 card cage was located and the A2A1A8 assembly is completely removed. The two drive control output controls (fwd and aft) are now readily available for the technician. The video amplifier that provides the LOVD0 signal is also easily accessible for adjustment. The LOVD0 signal used to be used for LTB only, but RLB has broadened its role and it is use in many of the low band BIT routines.

The total length of the low band fwd and aft distances from the channelizer output to the two low band TWT inputs has been reduced providing a performance improvement by reducing the RF propagation delay time through the pod.

(j) Multiple noise techniques, one in LA and one in LB, are now treated differently. We now multiplex the two noises at a 4MHz rate with a 50% duty cycle. This greatly simplifies the adjustment for the technician and we do not have to worry about characteristic of the low band transmitter changing during flight due to temperature changes. Bench testing of the new multiplexing losses

vs. the old mixing losses shows a slight improvement with the mux'ing. The multiplexing rates were varied to find the optimum rate which was found to be the same as mid/high band multiplexing rate.

(k) The low band techniques video parameters were modified to be as close as possible to the corresponding mid/high values and ranges. The L1 technique has been changed to function the same as the A1 technique. Detailed information on the classified aspects of the low band techniques can be found in the new 82-1 Technical Orders.

LA Subband LB Subband (V)7 L1, L3 L1, L2, L3, L4, L5, L6, L7, L8 (V)11 L1, L2, L3, L4, L5, L6, L8, L9 L1, L2, L3, L4, L5, L6, L7, L8, L9

(l) The test connector for the A2 section was removed since all of the PWAs were removed from the A2A2 and replaced with the two PWAs in the A1A2A2.

Signals were added to the A1A2A2 test connector making pod set-up simpler than the (V)7. This means that the TP Mux Adapter, part of the ALM-233, is no longer required and will be removed on the next update.

Low Band BIT

Both IBIT and BBIT were changed for RLB. There are no changes for DBIT.

When you run T6/7 or use your DTOS table you will notice that low band has a dedicated page for BIT. The testing of the low band functions and interfaces was greatly improved by the RLB change. The I/BBIT failure data is stored in the same 2K bytes that mid/high was stored. RLB divides the BIT Buffer into two sections; 2/3 for mid/high and 1/3 for low band. Both the mid/high and the low band fault data is stored in circular buffers where they the data down until the buffer is full. The next failure data will over-write the oldest data. for example if low band has filled down from position 1341 to 2000, the next failure data will be written into position 1341.

Fill direction Buffer locations Failure Data 0001Start m/h band oldest data 0002 Failure data 0003 Failure data . Failure data

1340 end m/h band newest data 1341 start low band oldest data

2000 end low band newest data

There is no correlation in time of occurrence between mid/high and low band failure data. They are arranged strictly in order of their own failure occurrence.

The RLB modification add an extensive set of IBIT and BBIT tests that required a second page for the BIT test in T6/7 and DTOS. The low band BIT test description are as follows:

RLB LOADING AND COMMUNICATIONS - IBIT.

This test has four parts: (1) that the XILINX has successfully been loaded and that the DONE signal status has been asserted as true (2) the LBPP EEPROM load file checksum tests for pages 3 and 4, (3) LBPP EEPROM palette and Matrix checksum passes, and (4) checks the PSPP to LBP interface.

RLB PROCESSOR TEST - IBIT.

The RLB Processor Test consists of four sub-tests: (1) RAM test, (2) CPU register test, (3) Addressing test, and (4) ALU tests.

RLB MISSION DATA - IBIT.

The Mission Data test checks that the matrix file in the PSP memory matches the one in the LBP memory. The number of successive failures necessary for a fault indication is 1.

XILINX ECHO - IBIT.

Tests the parallel I/O between the LB CPU and the XILINX devices.

MODULATION CONTROL BUS - IBIT.

Tests the modulation control data bus and address bus between the LB Controller PWA and the LB Interface PWA.

DISCRETE ECHO - IBIT.

Test control of the VCO Heater on/off command and the subband LB channelizer RF low-pass filter on/off command.

DITHER/CHOP TESTS - IBIT.

Test the LB Controller outputs for dither and chop phase control signals from the LB Controller PWA to the LB Interface PWA.

RF DETECT - IBIT.

Checks the detected signals from the low band transmit antenna couplers for RF output when noise techniques are active.

VCO CONTROL - IBIT.

Checks the low band LA, LB, and LB Background VCO operation using wide band and narrow band noise.

RF ENABLE - IBIT.

Test the TTL signals for the LA and LB subband RF fast switches.

CIU LAMP - IBIT.

Tests the CIU lamp discrete from the low band to the Encoder PWA.

CRITICAL FAULTS - IBIT.

Checks test results for critical faults and halts processing if found.

FAULT LAMP - IBIT.

Test Mission Data Fault against detected faults. If fault is found the low band fault lamp is illuminated.

LAMOD/LBMOD FAULT – IBIT.

Repeater is programmed for a video wave at a 50% duty cycle for the non-fault condition. Once the video modulation has been removed, the processor waits three seconds, as required by the dual modulator specification, and looks for the fail condition. This test presently not implemented due variations in the dual modulators fault characteristics.

PSPP TO LBP INTERFACE FAULT - BBIT.

The PSPP checks the status periodically. The OPR/STBY between PSPP and LBC is also verified

BBIT STANDBY TESTS - BBIT.

The following signals are checked; (1) the +28VDLY, (2) TWT over temperature, and (3) High Voltage Overload.

READY/OPERATE TESTS - BBIT.

The following checks are made during the operate mode;

(1) The +28VDLY,

(2) TWT over temperature,

(3) High Voltage Overload,

(4) FWD RF Fault,

(5) AFT RF Fault

The Low Band faults are displayed as a separate table under DTOS and I/BBIT as shown in the following table.

LOW BAND DTOS TABLE

LBPP CHKSUM

ERR

PG3 PG4 RF FILTER FL1

LB MD CHKSM

ERR

PAL MAT CIU LAMP LMP

DONE FAULT DN LA VCO OFF NB WB

LOAD FAULT LD LB VCO OFF NB WB

PSP/LBP IF ERR COM LB BG VCO OFF NB WB

RF FAULT AFT FWD RF ENABLE LA LB

CWG FAULT CWG STBY/OP

SYNC

S/O

MOD FAULT LA LB LOW BAND A2

TWT OVR TMP OVTM

P

LA AGO BB OSC

POWER SUPPLY OVLD LB AGO BB OSC

CIRCUIT CARDS A12 A13

28V DELAY 28V

MD MATCH M/P

RATE GEN CH

P

DTH

MOD CONTROL AD

D

DAT

VCO HEATER HTR

Low band AGO.

Low band AGO performs a function similar to mid/high band AGO. This was the last major change made to the pod and was done without any hardware changes. The low band AGO has simplified much of the repeater function of low band since we are no longer concerned about the pod’s location on the aircraft and the aircraft type. Before the pod’s repeater gain had to be set to the worse case condition for aircraft and location giving up valuable dB’s of gain.

When the pod was transmitting noise a coupler-detector on each transmit antenna horn provided a video signal to the RF Threshold PWAs in the A1A1 and A2A1 pod sections. In the (V)7 pod the output signals from the RF Threshold PWAs was sent to the Fault Logic PWA in the A1A2A2 card cage. If there was no detected RF and noise was programmed than a low band fault was declared.

If the pod is oscillating because the gain of the pod is greater than the isolation of its transmit and receive antenna there would be a detected signal great enough to exceed the threshold.

RLB AGO works as follows; if either of LA or LB subbands are programmed for repeater the subband(s) are checked one at a time by deceasing the repeater path dual modulator attenuator setting to minimum (maximum pod gain) or until the pod oscillates. The software increments the dual mod repeater path attenuator until it finds the point where the pod stops oscillating. A fixed gain margin (dual mod attenuation) is added in a safety precaution for gain increasing due to temperature or other factors.

RLB AGO is called by the PSPP after mid/high band AGO has completed.

You must have either CB4 or CB5 on in the shop for low band AGO to execute.

Low band executes LA first LB last. This is the opposite pattern from mid/high band that executes HC first and MA last.

Since low band AGO is commanded from the PSPP, AGO can be programmed by the MDG to execute on a periodic bases or on a mode change.

One of the differences that the technician might note is that low band does not shut down the technique before AGO is run whereas mid/high band does not start the technique until after AGO has completed.

Low Band Start-up Sequence and Communications.

BOOT. The first the low band processor does is to boot the TI CPU “.

The boot program resides in a PROM on the A1A2A2A13 Processor PWA and enables the CPU I/O so it can start to load the two Xilinx’s.

Xilinx programming. Once the boot has been completed the Xilinx can now be loaded. The Xilinx U1 and U2 ICs are volatile must be reloaded every time the pod is powered up The 24K bytes of data is contained in the A1A2A2A12 Low band Interface PWA in U1 a special PROM/Sequencer. The INIT- signal from the Processor PWA enables the PROM/Sequencer and the data is clocked out by the CCLK clock signal as long as the DONE0 signal is not true. DONE0 will become true once both U1 and U2 Xilinx chips have successfully been programmed.

The DONE0 signal from the Processor PWA to the LBI PWA is used for an additional function. The DONE0 signal is converted by the LBI programmable Logic Array PAL, U15, into RLB_DONE. RLB_DONE has the same logic sense as the DONE0. The purpose was to provide additional drive capacity for the long line to A3A2A5.

Once the RLB_DONE has been asserted true, The PSP starts sending the Low Band Processor Program (LBPP) from pages three and four of 256K Memory PWA to the A1A2A2A13 Processor.

IBIT will run once the LBPP has completed and the FAULT extinguished, if there are no faults, the subband activity lamps illuminated for the selected mode, and the Training lamp set depending on the type of MD.

PSPP – LBP communication is provide by the Serial I/O PWA through the LBI PWA for level shifting to the LB Processor PWA.

The Low Band Palette.

Steps to a palette and MD.

(1) MDG generates techniques needed for specific threats or for training purposes. Unclassified technique names are used.

[technique][video parameters][subband]

[technique] = L1, L2, .........., L9

[video parameters] letters to identify unique video parameters.

[subband] = LA or LB

Example: L1ANLB This is the L1 technique with “AN” parameters and is for subband LB.

(2) The MDG places the techniques into positions in the uncompensated Palette(ABC01) array as shown below. Palette pair number 48 are always standby. Subband pairs are used because of the interaction of the LA and LB subbands.

MDG Uncompensated Palette ABC01 Pair Number

Subband LA Subband LB

01 ********* L1AS1LB...

02 L1AS1LA *********...

03 L1AS1LA L1AS1LB

04 ******** L3ANLB

05 ******** L3ANLB

06 L3ANLA ********

07 L2AALA L9ARLB

08 ******** L8ABLB

09 ******* *******

47 L4BNLA L5ANLB

48 STANDBY STANDBY

The uncompensated palette ABC01can be distributed to all of the required bases.

(3) The technician shall create a compensated palette for each serial number pod. This is required because of the variation in dual modulators, VCOs, and other RF devices that can uniquely change the desired parameters. For example the uncompensated palette may have a VCO tuned to a specific frequency.

When checking this with PVT it is found to off frequency and must have the tuning word corrected. When the program achieves the correct frequency the compensated palette for that serial number pod will write in corrected tuning word. This is true for depth of modulation characteristics as well. Once the parameters are corrected for that specific pod, a unique compensated palette is generated and can be loaded into the pod. Identifiers for palette number and pod serial number are used to discriminate and to verify correct usage.

Compensated Palette ABC01 for pod 00126 Pair Number

Subband LA Subband LB

01 ********* L1AS1LB...

02 L1AS1LA *********...

03 L1AS1LA L1AS1LB

04 ******** L3ANLB

05 ******** L3ANLB

06 L3ANLA ********

07 L2AALA L9ARLB

08 ******** L8ABLB

09 ******* *******

47 L4BNLA L5ANLB

48 STANDBY STANDBY

(4) The MDG generates a MD file that contains a Matrix File for low band. The Matrix file is a set of pointers for each pod mode select the pairs. The Matrix File contains the palette number for which it has been generated for. The palette and the MF are checked by the pod for a match. Each numbered pair in blue is a pointer to the palette above. For example in Mode 1 LA/LB is programmed for P- 07 Which has an L2 technique(L2AALA) in LA and an L9 technique(L9ARLB) in LB. With Mode 1 is selected the C9492 button 1 lower left(LA active) and lower right(LB active) will illuminate unless there is a fault. note that for Mid/High I have not used full technique identifiers for space reasons.

Mode 1 (XMIT 1 no buttons)

Subbands

S/B LA/LB MA MB1 MB2 MB3 MC HA HB HC

HIGH P-07 A1 A7 A1 A1 A7M V1 V4 R2

LOW A1

Mode 2 (XMIT 1 buttons 1-7)

Button Subband Technique

1 HC A1/A1

2 LA/LB P-09

3A LA/LB P-11

3B MB1 R1

3C MA A1

4A LA/LB P-14

4B N/A N/A

5 LA/LB P-10

6 LA/LB P-26

7 HC A3

8 N/A N/A

Mode 3 (XMIT 1 and button 8)

HIGH P-25 A4 A5/BN V3 V4 V1 V2 V4

LOW A1

Mode 4 (XMIT 2 and no buttons)

Standby

Mode 5 (XMIT 2 and button 1 through 7)

Only Mode 2 buttons, no Mode 1

Mode 6 (XMIT 2 and button 8)

Mode 7 (XMIT 3 no buttons)

HIGH P-27 A1 R1 A8 V1 A6 V4 A5 A3

LOW SC

Training/Combat --- Training ( lights C-9492 Button 5 lower left)

Mission Data

Previously the (V)7 required that the Program Verification Test (PVT) each time new MD was loaded into the pod. The MD was decoded by the SECP and instructs the technician to perform elaborate many adjustments and settings for each mode/subband. Looking at a MD for a (V)7 pod using Windows Explorer you will see the following files:

Ident 2K - Identifies MD Name, contains summary information Matdat 10K - Mid/High band MD used mainly by hatcheck. - From MISDAT_PMF Ofpspd 1K - From MISDAT_PMF, used by Hatcheck Saselb 1K - From MISDAT_PMF, Low Band Switch Settings.

MDV3LB_PMF 0K – This was an old low band re-design that was never incorporated MISDAT_PMF 11K - MD File loaded into pod. Only one loaded to pod.

Sasese 2K - Contains hard coded data constants that were used for gain settings

The RLB pods have only pointers for low band mission data that select a palette pair position as previously discussed, thus allowing MD to be loaded on the flight line without reprogramming in the I-Level shop. A (V)11 MD disk will have only two files;

Ident.mid 2K - Identifies MD Name, contains summary information misdat.mlf 12K – Low and Mid/High band matrix load files.

If you want to see the exact file sizes you can not use the Windows Explorer since it rounds off to the nearest 1K byte, you must use the DOS function and the DIR command.

Flight line loading is restricted to the OFP and MD. Palettes files are presently only loaded in the shop from the ASE.

SECP POD TESTING

With the RLB modification you no longer need to disassemble the pod for routine testing. With the movement of the Drive Control and the Video Amplifier to the A2A2 section, all manual adjustments are readily available to the technician. With the major changes to the hardware it only follows that there major software changes.

PVT

Most of the hated low band test have been deleted or changed.

PVT1-1 Mid/High Band Antenna Tilt Check. No change

PVT1 Noise Band Width Adjustments. This manual adjustment is made on each VCO. Since we can now digitally tune the VCO but the width adjust are still screw driver adjustments and we can have within a palette many different frequencies we must adjust the widths based on median of the MD tuned frequencies.

PVT2 Noise Bandwidth Adjustments. Since no two VCOs have the same tuning linearity, it is necessary to calibrate the tune and sweep voltages and correct them for the compensated palette.

PVT3 Repeater Compensation Test. This test measures and records the voltage vs. attenuation of the LA and LB dual modulators. This data is used in the compensated palette.

PVT4 Build Compensated Palette. This procedure verifies all requirements for a calibrated palette are met and then compiles the data for the palette file.

PVT35 KO Performance Test. This test was moved from System

Calibration to PVT. VCO9 testing was deleted from the test.

FUNCTIONAL TEST

The C6631 CIU has been deleted from the functional test( part of F3).

The C6631 was not being used by the USAF. Some of the C6631 lines in the umbilical have been severed and tied back per T.C.T.O.

Low band I/BBIT has been expanded as previously discussed.

HATCHECK

The major change you will see in HAT CHECK is that the 9492 CIU buttons 1 and 6 no longer control LB and LA techniques. Low band now operates as the mid/high band does for modes and buttons.

You will also notice that you will have many more techniques available in

LA and a new technique in LB. The video parameters have been changed to be more like the mid/high band video parameters.

SYSTEM CALIBRATION

We re-numbered the T12 series test. I am not sure that was a good change, but its done. T12 now provides improved testing of the low band functions, some which have not been tested previously.

T5 C6631. Deleted

T6.12 Subband Receiver Test. This may not be noticed but we have changed the hit count limits on the mid/high band Subband Receiver BIT. The limits were 40 to 255 and were changed to 40 to 511. This eliminates the problem of having failures in flight that cannot be duplicated on the ground in ambient conditions. The problem was found originally in environmental temperature testing. It turns out that the failures would periodically occur at the high and low temperatures however not at room ambient. The system performance was not impacted, just false alarms in BIT.

T10.2 Clocks Test. Since we removed the old Clock PWA and the new low band processor PWA generates the clocks it needs internally, the clocks test now only measures the 4MHz clock.

T10.4 Chop Phase Control Test. This used to be the Dither Test. Since we have tests of both the Dither and Chop Phase Control as part of our BIT test we only check the single ended input to the A1A2A2A9 PWA and the differential output of the A1A2A2A9 PWA. Dither = 0.25 of the Chop Phase Control signal.

T12.3 Low Band Receive Balance/Gain. is made using the antenna cables rather than the test connectors. This was done since there a significant difference in fwd and aft cable lengths.

T12.4 Low Band Transmitter Balance and Gain. This test measures and balances the gain of the low band transmitter from the driver input to the output as measured at the filter-couplers, coupled output.

T12.5 Low Band VCO Test. This test now checks many new parameters of the VCO previously not tested at the I-Level shop, such as modulation sensitivity variation and minimum and maximum FM deviation. This test also measures the rated RF output power.

T12.6 Low Band L1 Technique. Since we have redefined the L1 technique to have the same video characteristics as the Mid/High Band A1 technique we designed the test like T21.1.

T12.7 Low Band Repeater/Noise Attenuator Test. This test checks the dual modulators and the VCO combiner, T12.8 Low Band Filter Test. This test check the operation and accuracy of the LB subband technique filter.

T12.9 Low Band Fault Circuits. There two basic tests; (1) CB3/PSOVLD test and (2) RF Fault Detector test

T12.10 Low Band Hypot. No change only re-numbered.

T12.11 Low band HVPS Test and Adjust. No longer used with the elimination of the TS-3224/ALM-126 HVPS Test Set

T12.12 Low band LOVDO Test/Adjustment. This is a new test measures and adjusts the LOVDO signal that is now used BIT and VCO testing. The LOVDO signal is actually a low when RF is present and a high when RF is off.

TROUBLESHOOTING

Low band troubleshooting just got a lot simpler. There are only 2 PWAs not 12. They are easy to get to, BIT test has been expanded. The Harmonization Table was updated for the RLB changes. Figure 6 shows the RLB Interconnects.

Figure 6. RLB Interconnect Diagram