17-R-RT01_Attachment_1.pdf

SOLICITATION NUMBER: N00173-17-R-RT01

ATTACHMENT 1

PERFORMANCE WORK STATEMENT

Semiconductor Engineering: Modelling, Simulation and Design, Fabrication and Testing

Research

1. BACKGROUND

The Electronic Sciences and Technology Division (ESTD), Code 6800 of the U.S. Naval

Research Laboratory (NRL) is engaged in the development of advanced semiconductor materials, devices, and circuits for use in a variety of applications including optoelectronics, microwave devices, and power electronics. The potential application areas for these new technologies address a broad range of military missions, so the research includes reliability testing, physics of failure analysis, and environmental testing including nuclear and space radiation effects.

The mission of ESTD is to produce novel electronic devices having advanced properties and capabilities and to transition these devices to the warfighter. This is achieved through coordinated modeling, simulation, and design efforts to produce new device designs. These designs are realized in working devices through semiconductor growth and fabrication, and the device performance is measured in the characterization laboratories within ESTD. ESTD researches a wide range of technologies including basic electronic materials, high-powered electronics, high-speed microwave devices, and optoelectronics, each technology with their own critical performance parameters such as efficiency of operation, responsiveness, and power output.

2. OBJECTIVES

The present Performance Work Statement (PWS) addresses the ESTD mission by making skilled expertise available to ESTD in key technical areas. With such a wide area of research, there are often gaps in the ESTD expertise for specific technical areas, and this PWS seeks to bring expertise to ESTD in such areas. In addition, this PWS will bring technical versatility and agility to ESTD by enabling access to technical skills in a variety of areas. By so doing, we will enable continued responsiveness to the warfighter.

3. SCOPE OF WORK

The scope of work is to provide personnel to perform research for the ESTD in the following areas:

1. Semiconductor Device/Circuit Modeling, Simulation, and Design

2. Semiconductor Growth and Device/Circuit Fabrication

3. Semiconductor Material and Device Characterization

4. Reliability and Testing of Semiconductor Materials and Devices in Simulated

Operational Environments

This effort involves all aspects of development including modeling and simulation, device design, material growth and characterization, and device/circuit fabrication and characterization. The goal of design, fabrication, and testing is to produce functional devices that can be electrically or optoelectronically measured, and can prove the results of the modeling efforts. Efforts in support of the tasks delineated in the Performance Requirements in Section 4 below will be conducted in coordination with Principal Investigator (PI) led research teams that may include Government scientists and other Contractors. The quality and timeliness of the provider's contribution to the work will be evaluated in terms of its impact on the success of the overall project.

Clearance and Safeguarding: A Top Secret/Sensitive Compartmented Information (TS/SCI) facility clearance is required and a TS/SCI level of safeguarding is required.

4. PERFORMANCE REQUIREMENTS AND SPECIFIC TASKS AND DELIVERABLES

The contractor shall conduct independent research and development on projects of interest to and defined by ESTD scientists. The primary place of contract performance is onsite at NRL so that the contractor can take advantage of the facilities and capabilities resident within

ESTD and the rest of NRL. The contractor shall assemble teams of skilled scientists and engineers to address the technical challenges faced by ESTD scientists, perform a coordinated modeling, simulation, design, fabrication, and characterization effort to address these challenges, and report the results to ESTD scientists. When appropriate, the contactor will work in collaboration with ESTD personnel to maximize efficiency.

Specific Tasks and Deliverables are as follows:

4.1. Semi-conductor Device/Circuit Modeling, Simulation, and Design

4.1.1. The Contractor shall perform theoretical research to develop numerical models of electronic and atomic structure for optoelectronic, microwave, and power electronic devices. The goal of these efforts is to create a theoretical basis for the design of novel materials for advanced electronic devices.

Deliverable: A001 Report on atomic and electronic modeling results.

4.1.2. The Contractor shall conduct experimental research on device model execution and interpretation of experimental data for device operation in its intended environment.

Analyses are intended to produce a model for the operational environment and simulations and predictions of the device and circuit operation in the modeled environment. The results of these efforts serve to validate the models produced in 6.1 and provide insight into means for improving the models and new technological paths to pursue for new devices.

Deliverable: A002 Report on device and circuit operation simulation results.

4.1.3. The Contractor shall develop specialized physics-based computer models for design, modeling, and simulation of novel materials and devices. The description of the novel materials and devices developed in this research may often require the development of new models based on the physical and engineering principles operative in these materials and devices.

Deliverable: A003 Specialized and physics-based computer codes.

4.2. Semiconductor Growth and Device/Circuit Fabrication

4.2.1. The Contractor shall grow semiconductor materials for producing the devices modeled in task 6.1. The growth techniques should include molecular beam epitaxy

(MBE), organometallic vapor phase epitaxy (OMVPE), atomic layer deposition (ALD) and sputter deposition as well as those specified by the Task Manager. The choice of growth technique is based on what is most appropriate for the material of choice and the intended application. The growths employ various semiconductor materials for achieving a variety of structures. Operation and maintenance of all equipment is the responsibility of the contractor.

Deliverables: A004 Report on semiconductor material grown and structures achieved.

A005 Semiconductor materials grown for fabrication.

4.2.2. The Contractor shall fabricate devices modeled in task 6.1 from materials grown in

6.4. The goal of this effort to produce functional devices such as optical detectors, solar cells, field-effect transistors (FETs), and diodes which can be characterized to test the results of the modeling, simulation, and design efforts. Operation and maintenance of all equipment is the responsibility of the contractor.

Deliverables: A006 Report on the procedure to fabricate the material grown into device.

A007 Devices.

4.2.3. The Contractor shall fabricate integrated circuits by using the parts/devices of tasks

6.4 and 6.5, and integrating commercial off the shelf (COTS) parts for applications to be specified by the Task Manager. Often times, the application of interest requires development beyond the discrete part (e.g. an integrated circuit). In these cases, circuits are fabricated using the parts that have been developed and commercial parts where appropriate. Example circuits are optoelectronic applications such as focal plane arrays and the associated read-out circuits, solar cell arrays, analog circuits for power conversion and switching devices, and waveguide and microstrip circuits for microwave applications. Operation and maintenance of all equipment is the responsibility of the contractor.

Deliverables: A008 Report on the circuit design and fabrication.

A009 Circuits.

4.3. Semiconductor Material and Device Characterization in Simulated Environments

The following three sub-tasks describe semiconductor material and device characterization in simulated environments.

4.3.1. The Contractor shall characterize structural attributes of the materials, devices, and circuits of tasks 6.4 – 6.6. Structural characterization techniques may include optical microscopy, ellipsometry, x-ray diffraction, and electron microscopy. The choice of technique depends on the material and material structure under study. The results of these characterizations determine the atomic and crystalline structure of the materials grown within the project.

4.3.2. The Contractor shall characterize electrical attributes for the materials, devices, and circuits that are grown and fabricated under this project. Electrical characterization techniques include current-voltage (I-V), capacitance-voltage (C-V), ac conductance, and

Hall effect. Character-ization of active and/or passive microwave devices involves use of network analyzers, spectrum analyzers and other microwave test equipment to determine the linear and/or nonlinear characteristics of the devices.

4.3.3. The Contractor shall characterize optoelectronic attributes for the materials, devices, and circuits that are grown and fabricated under this project. Optoelectronic measurements include quantum efficiency, electroluminescence (EL), Fourier Transform

Infrared Spectroscopy (FTIR), and I-V measurements under simulated solar illumination. The choice of specific technique depends on the material, device, or circuit under study.

Deliverable: A010 Report on the characterization of the contractor-developed semiconductor material/device.

4.4. Reliability and Environmental Testing of Semiconductor Materials and Devices in

Simulated Operational Environments

4.4.1. The Contractor shall conduct reliability testing for materials and devices developed in this project. The reliability testing refers to measurement of the pertinent parameters from the devices and circuits to include electrical, optical and/or thermal properties of the devices. The reliability testing also includes failure analysis of the failed devices to determine failure modes and mechanisms.

Deliverable: A011 Report on reliability.

4.4.2. The Contractor shall perform environmental testing for demonstrating the circuit performance in a relevant environment. Environmental testing is done to demonstrate the device and/or circuit performance in a relevant environment. This testing includes device and circuit characterization before, during, and after exposure to various environmental factors including temperature, humidity, electrical bias, particle radiation, and illumination. These measurements also include annealing studies after the environmental exposure.

Deliverable: A012 Report on environmental testing.