E-Vetronics Phase II RFI 9 August 2024.pdf

DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. OPSEC#8925.

Description of Intent:

The U.S. Army Contracting Command - Detroit Arsenal (ACC-DTA), in conjunction with U.S. Army’s Combat Capabilities Development Command Ground Vehicle Systems Center (DEVCOM GVSC) Vehicle Electronics and Architecture (VEA), is issuing a Request for Information (RFI) for the procurement of a High-Performance Computing Module (HPCM) solution for U.S. Army Ground Combat Vehicles. A HPCM is a computing device that balances edge computing and centralized computing. GVSC - VEA is requesting information on all potential High-Performance Computing processor chip solutions that address HPCMs. However VEA is not soliciting enterprise HPCM solutions at this time.

Current U.S. Army Ground Combat vehicles intend to make use of emerging technologies to balance edge and centralized computing. These needs are based upon new features and capabilities to support fused sensor data with enough processing capacity to support additional capabilities including, but not limited to, Aided Target Detection/Recognition (AiTDR), Automated Lethality, Survivability, and Defense. The goal is to take current algorithms for these technologies as well as Artificial Intelligence/Machine Learning (AI/ML) capabilities and evaluate them for true processing needs.

The objective of this RFI is to better understand the availability and capabilities of products and the potential of manufacturers in both processor and processing technologies as well as gaining an understanding of total package integration challenges. The goal is to find that equilibrium balance of edge and centralized computing. The information gathered by the U.S. Army through this RFI, along with other market investigation data, is solely intended for use by the U.S. Army and will not be shared with any company. Participation in this RFI provides an important opportunity to influence the U.S. Army’s approach to procuring the HPCM solution for U.S. Army Ground Combat Vehicles. The U.S. Government is in no way liable to pay for or reimburse any companies or entities that respond to this announcement. Any costs incurred by interested companies in response to this announcement will NOT be reimbursed. This is a RFI ONLY and is not a solicitation for proposals;

therefore, no questions will be taken at this time. A prototype project will not be awarded in response to this announcement.

RESPONSE TIME: We thank you in advance, for your time and participation in this RFI. The U.S.

Government requires all responses be returned by 3:00 pm Eastern Standard Time (EST), 11 September 2024 to Allison Kasper at allison.m.kasper.civ@army.mil.

PART 1. BUSINESS INFORMATION: Administrative information as the first section of your submission. Please provide the following:

1. Manufacturer

a. Company Name (and any former names):

b. Traditional or Non-Traditional Contractor:

*Non-Traditional Contractor: An entity that is not currently performing and has not performed, for at least the one-year period preceding the solicitation of sources by DoD for the procurement or transaction, any contract or subcontract for the DoD that is subject to full coverage under the cost accounting standards prescribed pursuant to section 1502 of title 41 and the regulations implementing such section (see 10 U.S.C.2302(9)).

c. Mailing Address:

mailto:allison.m.kasper.civ@army.mil

2. Personnel Responding to this Survey

a. Name:

b. Title:

c. Company Responsibility/Position:

d. Telephone/Fax Numbers:

e. E-mail address:

PART 2. TECHNICAL QUESTIONNAIRE:

Questions:

1) What processor and GPU product lines and families do you currently support (e.g. Intel, AMD, Arm, Nvidia, Qualcom, ect.)?

2) Does your chipset work well in a military ruggized container in extreme heat?

a. If so, how would you propose to cool the system?

3) Does your processor have any hardware safety features?

4) What video interfaces does your device support?

a. How many independent displays can your device drive and over what interfaces?

b. What video interfaces and formats do you support?

5) Have any of these interfaces been used in a military application before?

a. If yes, what type of physical connectors were used?

i. If known, list the connector family or part number.

b. What environments has this been tested in?

i. Will these components survive testing against ATPD-2404?

6) Do any of your current computing products support Time Sensitive networking (TSN) as an end-point?

7) What Input/Output (I/O) interfaces do your current computing products support?

a. How many of each interface do you support?

8) What is your processing to power consumption performance (MIPS3/W)?

a. Do you support active power management in a thermally challenging environment?

b. At what temperature does the processor start reducing its processing capacity or what is the temperature to power consumption curve?

9) What are your computing device’s low end operating temperatures?

10) What is the cost point of each device?

11) What is the current Technology Readiness Level (TRL) of the hardware security module technology? Descriptions of TRLs are provided below.

12) Does your HPCM have any Trusted Platform Module (TPM) or encryption methodology on the chipset. If not, please elaborate on any security features it might have.

Technology Readiness Levels (TRLs) Definitions

Level 1: Basic Principles observed and reported:

Lowest level of technology readiness. Scientific research begins to be translated int applied research and development. Examples might include paper studies of a technology’s basic properties.

Level 2: Technology concept and/or application formulated:

Invention begins. Once basic principles are observed, practical applications can be invented.

Applications are speculative and there maybe no proof or detailed analysis to support the assumptions. Examples are limited to analytic studies.

Level 3: Analytical and experimental critical function and/or characteristic proof of concept.

Active research and development is initiated. This includes analytical studies and laboratory studies to physically validate analytical predictions of separate elements of the technology.

Examples include components that are not yet integrated or representative.

Level 4: Component and/or breadboard validation in laboratory environment.

Basic technological components are integrated to establish that they will work together. This is relatively “low fidelity” compared to the eventual system. Example include integration of “ad hoc” hardware in the laboratory.

Level 5: Component and/or breadboard validation in relevant environment.

Fidelity of breadboard technology increases significantly. The basic technological components are integrated with reasonably realistic supporting elements so it can be tested in a simulated environment. Examples include “high fidelity” laboratory integration of components.

Level 6: System/subsystem model or prototype demonstration in a relevant environment.

Representative model or prototype system, which is well beyond that of TRL 5, is tested in a relevant environment. Represents a major step up in a technology’s demonstrated readiness.

Examples include testing a prototype in a high-fidelity laboratory environment or in simulated optional environment.

Level 7: System prototype demonstration in an operational environment.

Prototype near, or at, planned operational system. Represents a major step up from TRL 6, requiring demonstration of an actual system prototype in an operational environment such as an aircraft, vehicle, or space. Example include testing the prototype in a test bed aircraft.

Level 8: Actual system completed and qualified through test and demonstration.

Technology has been proven to work in its final form and under expected conditions. In almost all cases, this TRL represents the end of true system development. Examples include developmental test and evaluation of the system in its intended weapon system to determine if it meets design specifications.

Level 9: Actual system proven through successful mission operations.

Actual application of the technology in its final form and under mission conditions, such as those encountered in operational test and evaluation. Examples include using the system under the system under operational mission conditions.