Attachment 1 - SBC Requirements Document.pdf

ASDE‐X SMR3 Rehost Project

VME Single Board Computer Requirements

Background The current Airport Surface Detection Equipment Model X (ASDE‐X) supports three Surface Movement

Radar (SMR) sensors: SMR Raytheon (SMRr), SMR Improved (SMRi) and a modified ASDE‐3 SMR (SMR3).

The SMR3 utilizes three custom VMEbus (Versa Module Europa) Bus modules in a 6U VMEbus (IEEE‐

1014‐1987) chassis to send control signals to and monitor status signals from the transmitter/receiver

(T/R). Two of these modules are VMEbus slave devices while the third is a pass‐through device that only uses power and ground from the VMEbus backplane. A single board computer (SBC) is used as the slot 0

VMEbus system controller to coordinate the sending and receiving of T/R control and status signals.

The current 32‐bit x86 processor based SBC runs custom applications Windows XP as the host Operating

System (OS). As Windows XP is no longer supported and the current SBC is no longer available, a new

SBC that supports a current OS must be procured to replace the obsolete SBC and OS for each ASDE‐X with SMR3. The OS chosen for this replacement is the most current version of Red Hat Enterprise Linux – version 7 – which is a 64‐bit OS.

The two VMEbus slave modules that are controlled by the SBC have simple VMEbus interfaces that support only 16‐bit data width (D16) single cycle transfers (SCT) with A24 address modifier. In addition, one of the modules generates VMEbus interrupts to notify the SBC when a particular event happens.

Furthermore, the simple VMEbus interfaces have a quirk in that they do not respond to A24 D16 reads and writes if address lines A[31:24] are driven high during the address cycle; these modules expect that these address lines are low.

Requirements In order to ensure successful operation of the SMR3 with a replacement SBC and re‐hosted applications, only SBCs that meet the following requirements will be considered for procurement.

Hardware Configuration R‐HC‐1. The SBC shall not have a P0 connector as the VMEbus chassis in which it will operate has an aluminum bar down the middle of the backplane that prevents VMEbus modules with a P0 connector from seating.

R‐HC‐2. The SBC form factor shall be 6U size B (233mm x 160mm) with P1 and P2 connectors in standard

VME configuration.

R‐HC‐3. The SBC shall occupy at most two slots.

Attachment 1

R‐HC‐4. The SBC processor shall be a Generation 4 or later Core i5 or i7 Intel processor compatible with the X86‐64 instruction set architecture (ISA).

R‐HC‐5. The SBC shall have no less than 8GB of RAM.

R‐HC‐6. The SBC shall have a minimum of 32GB bootable solid state flash storage (SSD).

R‐HC‐7. The SBC shall have a video interface (VGA, DVI‐D, HDMI, or DisplayPort) available on the front panel.

R‐HC‐8. The SBC shall have a minimum of one (1) USB 2.0 serial interface available on the front panel.

R‐HC‐9. The SBC shall have a minimum of one (1) 100 Base‐T or 1000 Base‐T Ethernet interface available on the front panel.

R‐HC‐10. The SBC shall support remote Local Area Network (LAN) boot via PXE.

VME Bus Support R‐VBS‐1. The SBC shall comply with the IEEE‐1014‐1987 VMEbus specification.

R‐VBS‐1.1 The SBC shall be the VMEbus Slot 0 system controller by default.

R‐VBS‐1.2 The SBC shall not be reliant upon any VME64 or VME64x features.

R‐VBS‐2. The SBC VMEbus interface shall not drive address lines (A[31:24] = 0xFF) during A24 address cycles.

R‐VBS‐3. The SBC VMEbus interface shall allow VMEbus interrupts to be initiated by a slave module.

R‐VBS‐4. The SBC shall have a linux Board Support Package (BSP) consisting of drivers that implement the standard linux kernel driver API for the VMEbus controller. A user mode library is desired but not required.

R‐VBS‐4.1. The BSP shall be compatible with Red Hat Enterprise Linux (RHEL) version 7.

R‐VBS‐4.2. The BSP shall support the x86‐64 ISA.

R‐VBS‐4.3. The BSP shall implement drivers as kernel modules and not rely upon a custom kernel.

R‐VBS‐4.4. The BSP shall provide support for 16‐bit data width (D16) single cycle transfers – read and write – with the A24 address modifier.

R‐VBS‐4.5. The BSP shall provide support for handling interrupt requests from VMEbus slave modules.