CHIPS-Commercial Fabrication Facilities NOFO Amendment 1.pdf

CHIPS Incentives Program – Commercial Fabrication Facilities

Notice of Funding Opportunity

NOTICE OF FUNDING OPPORTUNITY (NOFO)

EXECUTIVE SUMMARY

• Federal Agency Name: National Institute of Standards and Technology (NIST), United States Department of Commerce

• Funding Opportunity Title: CHIPS Incentives Program – Commercial Fabrication Facilities

• Announcement Type: Amendment

• Funding Opportunity Number: 2023-NIST-CHIPS-CFF-01

• Assistance Listing (CFDA Number): 11.037 – CHIPS Incentives Program

• Dates:

o Statements of interest from all potential applicants will be accepted on a rolling basis, beginning on Tuesday, February 28, 2023; statements of interest must be submitted at least 21 days prior to submitting a pre-application or full application.

o For potential applications for leading-edge facilities, pre-applications (which are optional) and full applications will be accepted on a rolling basis beginning on Friday, March 31, 2023.

o For potential applications for current-generation, mature-node, and back-end production facilities, pre-applications (which are recommended) will be accepted on a rolling basis beginning on Monday, May 1, 2023 and full applications will be accepted on a rolling basis beginning on Monday, June 26, 2023.

o For potential applications for wafer manufacturing facilities, pre-applications (which are recommended) will be accepted on a rolling basis beginning on Friday, September 1, 2023 and full applications will be accepted on a rolling basis beginning on Monday, October 23, 2023.

o For potential applications for semiconductor materials and manufacturing equipment facilities for which the capital investment equals or exceeds $300 million, pre-applications (which are recommended) will be accepted on a rolling basis beginning on Friday, September 1, 2023 and full applications will be accepted on a rolling basis beginning on Monday, October 23, 2023.

o At a later date, CPO expects to launch an additional funding process for applications relating to semiconductor materials and manufacturing equipment facilities with capital investments under $300 million, as well as an additional funding process for applications relating to R&D facilities. CPO will provide future guidance regarding potential additional funding opportunities.

The Department of Commerce may amend this NOFO at any time. It may also close the funding opportunity with at least 60 days’ notice. Changes will be communicated via https://www.grants.gov and https://www.chips.gov.

• Application Submission Address: https://applications.chips.gov/

Funding Opportunity Description: The CHIPS Incentives Program aims to catalyze long-term economically sustainable growth in the domestic semiconductor industry in support of U.S.

economic and national security. This is the first Notice of Funding Opportunity under this program. It seeks applications for projects for the construction, expansion, or modernization of

(a) commercial facilities for the front- and back-end fabrication of leading-edge, current-generation, and mature-node semiconductors; (b) commercial facilities for wafer manufacturing;

and (c) commercial facilities for materials used to manufacture semiconductors and semiconductor manufacturing equipment, provided that the capital investment equals or exceeds $300 million.

Table of Contents I. Program Description

A. Program Objectives

B. Program Summary

C. Program Priorities

II. Federal Award Information A. Funding Instrument

B. Funding Availability

C. Award Amount

D. Period of Performance

III. Eligibility Information A. Eligible Applicants

IV. Application and Submission Information A. How to Access an Application Package

B. Submission Dates and Times

C. Confidential Information

D. False Statements

E. Application Requirements

F. Requirements for Attachments Submitted through the CHIPS Incentives Program Application Portal

G. Statements of Interest

H. Content and Form of Pre-Application

I. Content and Form of Full Application Submission https://www.grants.gov/ https://www.chips.gov/ https://applications.chips.gov/

J. Funding Restrictions

K. Prohibition on Profit and Fees

V. Application Review Information A. Evaluation Criteria

B. Prioritization and Selection Factors

C. Review and Selection Process

D. Responsibility / Qualification Records on SAM.gov

E. Additional Information

VI. Federal Award Administration Information A. Federal Award Notices

B. Third-Party Expenses and Fees

C. Administrative and National Policy Requirements

D. Funding Availability and Limitation of Liability

E. Reporting

F. Federal Awarding Agency Contacts

VII. Appendix A. Definitions

FULL ANNOUNCEMENT TEXT

I. Program Description

This Notice of Funding Opportunity (NOFO) seeks applications for the CHIPS Incentives Program, authorized by Title XCIX—Creating Helpful Incentives to Produce Semiconductors for America of the William M. (Mac) Thornberry National Defense Authorization Act for Fiscal Year 2021 (Pub. L. 116-283, referred to as the CHIPS Act or Act), as amended by the CHIPS Act of 2022 (Division A of Pub. L. 117-167). The CHIPS Incentives Program is administered by the CHIPS Program Office (CPO) within the National Institute of Standards and Technology (NIST) of the United States Department of Commerce (Department).

The CHIPS Incentives Program can provide direct funding (via grants, cooperative agreements, or other transactions), loans, and loan guarantees (collectively, CHIPS Incentives) for eligible projects. This NOFO seeks applications for CHIPS Incentives that will support investments in the construction, expansion, and modernization of (a) commercial facilities in the United States for the front- and back-end fabrication of leading-edge, current-generation, and mature-node semiconductors; (b) commercial facilities in the United States for wafer manufacturing; and (c) commercial facilities in the United States for materials used to manufacture semiconductors and semiconductor manufacturing equipment, provided that the capital investment, as defined in Section IV.I.7 below, equals or exceeds $300 million.

This NOFO provides detailed information about the program objectives and requirements applicants will need to meet to receive funding. It also describes the procedures the Department will use to evaluate and select applications for funding. CPO will provide further guidance on these requirements and procedures in subsequent publications and through a series of public webinars, information about which will be available at https://www.chips.gov. Interested parties should routinely check https://www.chips.gov for updates.

A. Program Objectives The CHIPS Incentives Program aims to strengthen U.S. economic and national security, including economic resilience and competitiveness. The CHIPS Act sets forth multiple dimensions of this overriding objective:

• Strengthening the security and resilience of the semiconductor supply chain, including by mitigating gaps and vulnerabilities

• Providing a supply of secure semiconductors relevant for national security

• Strengthening the leadership of the United States in semiconductor technology

• Growing the economy of the United States and supporting job creation in the United

States

• Bolstering the semiconductor and skilled technical workforces in the United States

• Promoting the inclusion of economically disadvantaged individuals and small businesses

• Improving the resilience of the semiconductor supply chains of critical manufacturing industries1

For the CHIPS Incentives Program to be successful on these many dimensions, it must lay the groundwork for long-term growth and economic sustainability in the domestic semiconductor industry and promote the secure and resilient supply chains on which the sector relies. The industry must produce, at scale, secure leading-edge logic and memory chips critical to the national security and future economy of the United States. It must support current-generation and mature-node technologies essential for economic and national security. The industry must have a robust and skilled workforce and a diverse base of suppliers for semiconductor production. It must support research and development (R&D) that will drive innovation in design, materials, and processes that will accelerate the industries of the future. Further, it must support the broader U.S. economy, creating good jobs accessible to all, and supporting and growing local economies and communities.

For the CHIPS Incentives Program to succeed, the Federal funds must serve as a catalyst to galvanize private, state, and local investment in the semiconductor industry. That is, the program funds are a supplement to, not a replacement for, other sources of capital.

The CHIPS Incentives Program seeks to fund applicants that demonstrate a commitment to investment in the United States for the long term and projects that maximize private sources of capital. Only private industry can marshal the resources necessary to make the sustaining

1 See 15 U.S.C.§ 4652(d). See Appendix for the definition of “critical manufacturing industries.”

investments needed in the decades that follow to maintain a resilient, economically viable, and growing U.S. semiconductor industry.

B. Program Summary The CHIPS Incentives Program must fund a variety of projects to achieve its economic and national security objectives. Projects will vary in technology, scale, cost, location, risk, workforce needs, and other factors. To fund any project, the Department must engage in an individualized review to determine whether the project is in the economic and national security interests of the United States and whether it satisfies the many eligibility requirements of the CHIPS Act, as well as to determine the types and amounts of funding appropriate for the project.2 Because successful projects will vary in their attributes, the CHIPS Incentives Program funding awarded to projects will also vary. There is no one-size-fits-all award. A successful applicant should expect that the amount and type of funding it receives will be individualized based on the Department’s analysis of the Federal funds needed to meet program and project objectives, including considerations specific to its application.

This NOFO describes considerations and procedures the Department will use to make these case-by-case determinations. This section summarizes, in a question-and-answer format, certain eligibility and procedural requirements for applications under this NOFO. It addresses what projects are eligible for funding under this NOFO and the statutory requirements for eligibility. It describes the types and amounts of funding available. It also summarizes the application process, which begins with a statement of interest and proceeds through an optional pre-application phase (recommended for current-generation, mature-node, and back-end production facility applications; wafer manufacturing facility applications; and applications for eligible semiconductor materials and manufacturing equipment facilities) and then full application, due diligence, and award preparation and issuance phases. Other sections of the NOFO provide more detailed information on these subjects.

1. What facilities are eligible for funding under this NOFO?

This NOFO seeks applications for the construction, expansion, or modernization of commercial facilities in the United States in the following categories.

Leading-Edge Facilities for logic or memory that utilize the most advanced front-end fabrication processes which achieve the highest transistor and power performance. For logic, this currently includes facilities that produce semiconductors at high volumes using extreme ultraviolet (EUV) lithography tools. For memory, this currently includes facilities capable of producing 3D NAND flash chips with 200 layers and above, and/or dynamic random-access memory (DRAM) chips with a half-pitch of 13 nm and below.

Current-Generation Facilities that produce semiconductors that are not leading edge, up to 28 nm process technologies, and include logic, analog, radio frequency, and mixed-signal devices.

New and expanded current-generation front-end fabrication facilities will deliver manufacturing

2 See 15 U.S.C. §§ 4652(a)(2)(C)(i)(I)-(II), 4652(a)(3)(A).

capacity for current-generation semiconductor technologies, as well as new and specialty technologies such as devices based on compound semiconductor materials.

Mature-Node Facilities that fabricate generations of: (a) logic and analog chips that are not based on FinFET, post-FinFET transistor architectures, or any other sub-28 nm transistor architectures; (b) discrete semiconductor devices such as diodes and transistors; (c) optoelectronics and optical semiconductors; and (d) sensors.

Back-end Production Facilities for the assembly, testing, or packaging of semiconductors that have completed the front-end fabrication process. This category includes advanced packaging of semiconductors. The Department is particularly interested in projects that ensure competitive operating costs within the United States (e.g., through automation).

Wafer Manufacturing Facilities for the high-volume production of semiconductor wafers, including wafers made from silicon, silicon carbide, and gallium nitride. These facilities are the sites of ingot production and wafer slicing, lapping, polishing, cleaning and inspection.

Semiconductor Materials Facilities for the manufacture or production, including growth or extraction, of materials used to manufacture semiconductors, which are the chemicals, gases, raw and intermediate materials, and other consumables used in semiconductor manufacturing.

Specific examples include but are not limited to polysilicon; photoresists and ancillaries (developers, strippers, litho solvents, and anti-reflective and hardmask layers); sputter targets (including tantalum, titanium, and aluminum); and materials specifically used in quantum information systems (such as hafnium and niobium). Applications for the construction, expansion, or modernization of commercial semiconductor materials facilities will be eligible for this NOFO only if the capital investment, as defined in Section IV.I.7, equals or exceeds $300 million.

Semiconductor Manufacturing Equipment Facilities for the physical production of specialized equipment integral to the manufacturing of semiconductors and subsystems that enable or are incorporated into the manufacturing equipment. Specific examples of semiconductor manufacturing equipment include but are not limited to deposition equipment, including chemical vapor deposition, physical vapor deposition, and atomic layer deposition;

etching equipment (wet etch, dry etch); lithography equipment (steppers, scanners, extreme ultraviolet); wafer slicing equipment, wafer dicing equipment, and wire bonders; inspection and measuring equipment, including scanning electron microscopes, atomic force microscopes, optical inspection systems, and wafer probes; certain metrology and inspection systems; and ion implantation and diffusion/oxidation furnaces. Applications for the construction, expansion, or modernization of commercial semiconductor equipment facilities will be eligible for this NOFO only if the capital investment, as defined in Section IV.I.7, equals or exceeds $300 million.

Only facilities of the types listed above are eligible for funding under this NOFO at this time.

Application submission dates for projects vary by facility type and are as follows:

• Statements of interest from all potential applicants will be accepted on a rolling basis, beginning on Tuesday, February 28, 2023; statements of interest must be submitted at least 21 days prior to submitting a pre-application or full application.

• For potential applications for leading-edge facilities,3 pre-applications (which are optional) and full applications will be accepted on a rolling basis beginning on Friday, March 31, 2023.

• For potential applications for current-generation, mature-node, and back-end production facilities, pre-applications (which are recommended) will be accepted on a rolling basis beginning on Monday, May 1, 2023 and full applications will be accepted on a rolling basis beginning on Monday, June 26, 2023.

• For potential applications for wafer manufacturing facilities, pre-applications (which are recommended) will be accepted on a rolling basis beginning on Friday, September 1, 2023 and full applications will be accepted on a rolling basis beginning on Monday, October 23, 2023.

• For potential applications for semiconductor materials and manufacturing equipment facilities for which the capital investment, as defined in Section IV.I.7, equals or exceeds $300 million, pre-applications (which are recommended) will be accepted on a rolling basis beginning on Friday, September 1, 2023 and full applications will be accepted on a rolling basis beginning on Monday, October 23, 2023.

At a later date, CPO expects to launch an additional funding process for applications relating to semiconductor materials and manufacturing equipment facilities with capital investments under $300 million, as well an additional funding process for applications relating to R&D facilities.

CPO will provide future guidance regarding potential additional funding opportunities.

2. What are the eligibility requirements for funding under this NOFO?

The CHIPS Act imposes several eligibility requirements for funding.

First, funding is available only to “covered entities.”4 This term includes private entities or consortia of private and public entities that can demonstrate the ability to substantially finance, construct, expand, or modernize an eligible facility.5 Section III.A describes this requirement in more detail.

Second, funding is available to covered entities “to incentivize investment in facilities and equipment in the United States” for the fabrication, assembly, testing, advanced packaging, or production of semiconductors, materials used to manufacture semiconductors, or semiconductor manufacturing equipment.6 An applicant must demonstrate how the CHIPS Incentives requested

3 An application can contain more than one project if the projects are co-located and under common ownership and control. See Section I.B.5. Applicants may seek to combine in a single application leading edge projects and other project types eligible for funding under this NOFO. In such cases, an application will be considered a leading-edge application for purposes of the submission date if at least 75 percent of the application’s cumulative proposed capital expenditures are on leading-edge projects.

4 See 15 U.S.C. § 4652(a)(1).

5 See 15 U.S.C. § 4651(2).

6 See 15 U.S.C. § 4652(a)(1).

will incentivize the applicant to make investments in facilities and equipment in the United States that would not occur in the absence of the CHIPS Incentives.

Third, funding must be for the construction, expansion, or modernization of facilities of the kind described in Section I.B.1.7 For the purposes of this NOFO, construction means the construction of a new facility. Expansion or modernization includes, for example, significantly enlarging an existing facility, increasing the capacity of an existing facility via a material capital investment, such as by adding a new production line, and upgrading an existing facility, such as to a new node or converting a facility from another use. Both expansions and modernizations will be evaluated on the materiality of the investment relative to existing production. Projects that involve relocating a material amount of equipment, facilities, or production from one facility in the United States to another facility, new or expanded, are disfavored. Such projects will be deemed nonresponsive to this NOFO absent a compelling economic or national security justification.

Fourth, the CHIPS Act specifies that the covered entity must have a documented interest in constructing, expanding, or modernizing an eligible facility.8 And with respect to such construction, expansion, or modernization, the covered entity shall:

• Have been offered a covered incentive from a state or local jurisdiction (state or local incentive) where the project is located, for the purposes of attracting the construction, expansion, or modernization of the facility

• Make commitments to worker and community investment, including through training and education benefits paid by the covered entity and programs to expand employment opportunities for economically disadvantaged individuals

• Secure commitments from regional educational and training entities and institutions of higher education to provide workforce training, including programming for training and job placement of economically disadvantaged individuals

• Have an “executable plan,” i.e., a plan reasonably capable of successful implementation, to sustain the facility without additional funding from the CHIPS Incentives Program

• Have documented its workforce needs and produced a strategy to meet such workforce needs as well as the aforementioned commitments to worker and community investment

• Have determined the types of semiconductor technology it will produce at the proposed facility, and the customers, or categories of customers, to whom the items will be sold

• Have developed an “executable plan” to identify and mitigate relevant semiconductor supply chain security risks, and

• Have policies and procedures to combat cloning, counterfeiting, and relabeling of semiconductors, as applicable.9

7 See 15 U.S.C. § 4652(a)(4)(A).

8 15 U.S.C. § 4652(a)(2)(B)(i).

9 See 15 U.S.C. § 4652(a)(2)(B)(ii)-(iv).

The Department has designed this NOFO, including the application requirements and review process, to ensure that these statutory requirements will be met for projects receiving CHIPS Incentives.

3. What types of incentives can a project receive?

There are three types of CHIPS Incentives:

• Direct Funding, which provides funding to the applicant for eligible costs and can take the form of grants, cooperative agreements, or other transactions

• Loans, which are direct loans from the Federal government to the applicant for eligible costs

• Loan Guarantees, which are Federal guarantees of third-party loans to the applicant for eligible costs

A single application can result in an award (CHIPS Incentives Award) that contains more than one type of incentive. In the application, the applicant will specify which incentive type(s) it seeks; the amount of the incentive(s); and, for any CHIPS Loans and CHIPS Loan Guarantees, the essential terms being requested. However, projects may not receive CHIPS Loans or CHIPS Loan Guarantees if the majority of the goods they produce (by value or quantity) will be contracted to be sold to the Federal government.

Guidance on how applicants should develop their requests is set forth below. Applicant requests will be subject to review, due diligence, and negotiation, as described throughout this NOFO.

Ultimately, the Department will determine the appropriate amounts, funding types, and terms for each CHIPS Incentives Award.10 During the application process, the Department may request that an applicant modify its request for CHIPS Incentives based on an assessment of the request against the considerations set forth in this NOFO.

Applicants may be eligible to receive an additional incentive in the form of the Advanced Manufacturing Investment Credit (Investment Tax Credit).11 This separate incentive is administered by the Internal Revenue Service and provides a tax credit for qualifying capital investments in a manufacturing facility for which the primary purpose is the manufacture of semiconductors or semiconductor manufacturing equipment, subject to certain credit recapture rules. The Department expects applicants to take advantage of the Investment Tax Credit, if eligible, to the fullest extent possible. Applicants must also detail in their application the support expected from the Investment Tax Credit.

4. What constitutes a project for purposes of an application?

For purposes of an application, a “project” is a set of capital expenditures for the construction, expansion, or modernization of a single facility. A project also includes any related workforce

10 See 15 U.S.C. § 4652(a)(3)(A).

11 See 26 U.S.C. § 48D.

development or operating expense costs for the facility that the applicant proposes to cover with CHIPS Incentives funds.

5. Can an application include more than one project?

Yes. If an applicant wishes to apply for funding for more than one project, covering separate facilities within a single location and under common ownership and control, the applicant should include all of those projects in a single application. For example, if the applicant intends to construct, expand, or modernize three facilities at a single location, the applicant should submit one application that includes three projects, corresponding to the construction, expansion, or modernization activities associated with each facility. An application may contain projects that occur simultaneously or sequentially (although each project must be eligible for funding under this NOFO to receive funding). If an applicant wishes to propose projects involving facilities at different locations, or under different ownership and control, these projects should be included in separate applications.

See Sections IV.H.2 and IV.I.3 for information about how each project should be described within the application. The Department may choose to fund all, some, or none of the projects proposed in a single application.

6. How can CHIPS Incentives funds be used?

Funds made available under the CHIPS Incentives Program, including the guaranteed portion of a third-party loan, may only be spent on eligible uses, which include the costs to:

• finance the construction, expansion, or modernization of a facility, or equipment for that facility

• support site development and modernization for a facility

• support workforce development for a facility

• pay reasonable operating expenses for a facility, as determined by the Department.12

Not all of the applicant’s activities within a project may be eligible to receive program funds.

However, as described in Sections IV.H.2 and IV.I.3, the applicant must clearly describe any activities within its proposed project that may be eligible uses for CHIPS Incentives. In addition, activities are eligible to receive program funds only to the extent that they are consistent with the requirements of this NOFO.

Certain purposes are ineligible uses for CHIPS Incentives. See Section IV.J for more details.

7. How much support can a project receive in CHIPS Direct Funding?

In determining the CHIPS Direct Funding amount for a project, the Department will consider the project’s financial model and expected cash flows, the project’s estimated internal rate of return (IRR), the strategic importance of the project to U.S. economic and national security, the extent of private investment, the risks associated with the project, the amount and type of government

12 See 15 U.S.C. § 4652(a)(4).

financial assistance (including state and local incentives, and the Investment Tax Credit), the availability of program funds, and other factors.

There is no fixed amount for how much a project can receive in CHIPS Direct Funding. The Department expects that the level of support from CHIPS Direct Funding will vary based on the specific characteristics of individual projects and the factors cited above. It is generally expected that most CHIPS Direct Funding awards will range between 5-15% of project capital expenditures.13 This range accounts for the expectation that most projects will be eligible for the Investment Tax Credit. The range may be higher if a project is not eligible for the Investment Tax Credit, such as for projects related to semiconductor materials facilities.

8. How much support can a project receive in CHIPS Loans or CHIPS Loan Guarantees, and on what terms?

There is no fixed limit on the loans or guarantees that a project may receive. Applicants should request CHIPS Loans or CHIPS Loan Guarantees to provide debt financing that is not available on comparable terms on the private market. CHIPS Loans and CHIPS Loan Guarantees are meant to supplement and not substitute for private funding. All loans and guarantees will be subject to rigorous underwriting and due diligence. The Department will not make a loan or issue a guarantee unless it determines that the applicant has a reasonable prospect of repaying the principal and interest on the loan or guaranteed loan, and that the amount of the loan or guaranteed loan, when combined with amounts available to the applicant from other sources, will be sufficient to carry out the project.14

The Department will consider multiple factors when determining the amount and features of any CHIPS Loan or CHIPS Loan Guarantee, including a project’s financial model and expected cash flows, the project’s estimated IRR, the strategic importance of the project for U.S. economic and national security, the risks associated with the project, the amount and type of government financial assistance, the availability of program funds, the ability for the project to support the proposed financing from a credit underwriting perspective, and other factors detailed in this

NOFO.

The specific terms of a CHIPS Loan will be based on the project’s financing requirements and risk characteristics, and will be subject to negotiation. Applicants should consider the following terms as a baseline when applying for a CHIPS Loan:

• Interest Rate: The interest rate on a CHIPS Loan will generally be based on the cost of funds to the Department of the Treasury for obligations of comparable maturity plus a portion of the spread to the market rate for commercial loans or debt of similar risk, tenor, and terms.

13 Project capital expenditures refers to expenses incurred in the construction or improvement of physical assets, such as the costs of land, building and construction, equipment and installation, physical improvements, and working capital during the construction phase.

14 See 15 U.S.C. § 4652(g)(2).

14 See 15 U.S.C. § 4652(g)(2).

• Tenor: Loans will generally be extended for a term that covers the construction period plus up to 15 years. The maximum tenor is 25 years.

• Structure: Loans will be available on both a corporate and project finance basis, depending on the legal structure and nature of the project.

• Amortization: Corporate finance loans will generally be bullet loans repayable at maturity. Project finance loans will generally be non-amortizing during the construction period of a project and then amortizing until maturity.

• Prepayment: CHIPS Loans may be prepaid at the election of the borrower, subject to prepayment periods, waiting periods, and other terms to be agreed upon.

The specific terms of a CHIPS Loan Guarantee will be subject to negotiation with the applicant and the third-party lender(s). While the extent of the loan guarantee will vary based on the financing requirements and risk characteristics of a transaction, loan guarantees are not expected to cover more than 80% of any third-party debt obligation. CHIPS Loan Guarantees will be subject to underwriting and diligence standards comparable to CHIPS Loans.

9. How does the application process work?

A summary of the key stages of the process is provided below and detailed further in Section V.

The application process includes the following phases: 1) Statement of interest, 2) Recommended pre-application, 3) Full application, 4) Due diligence, and 5) Award preparation and issuance. Pre-applications and full applications will be reviewed on a rolling basis. CPO will provide feedback to the applicant at various stages to inform the applicant’s decision regarding whether to proceed to the next step in the process and to increase the likelihood of receiving applications that can realize the goals of the CHIPS Incentives Program.

The process includes the following steps:

Statement of Interest: A potential applicant must submit a statement of interest with a brief description of the planned application. The statement of interest enables the Department to gauge interest in the program and plan for pre-application or application review. Statements of interest must be submitted a minimum of 21 days before submission of a pre-application or full application.

Pre-Application (recommended): A potential applicant may submit a pre-application, which contains a more detailed description of the proposed application than the statement of interest, including summary financial information and an Environmental Questionnaire. This optional pre-application phase creates an opportunity for dialogue between the Department and the potential applicant to ensure the proposed application would meet program requirements and address program priorities. The Department strongly encourages pre-applications for potential applicants for current-generation, mature-node, or back-end production facilities; potential applicants for wafer manufacturing facilities; and potential applicants for eligible semiconductor materials and manufacturing equipment facilities.

Topics of discussion during the pre-application phase may include, but are not limited to:

relevance to economic and national security goals of the proposed project(s); the scope of the proposed project(s); capital structure; long-term economic viability; CHIPS Incentives request;

plans to recruit, train, and retain the necessary workforce; environmental risk; environmental impacts and potential mitigation; cybersecurity and risk management plans; long-term investment plans for capital expenditures; and R&D. Pre-application review will conclude with a written assessment of the strengths and weaknesses of the pre-application and any further recommendations for improvement, as appropriate. The written assessment will be shared with the potential applicant and will include a recommendation for next steps, e.g., to submit a revised pre-application, submit a full application, or not submit a further pre-application or full application.

The Environmental Questionnaire submitted as part of the pre-application will allow the Department to assess the likely level of review under the National Environmental Policy Act (NEPA) earlier in the process, and to work with the potential applicant to ensure that all required environmental information is available as early as possible during the full application and due diligence stages. This can help expedite the process for potentially successful applications. For more information on the NEPA process, see Section VI.C.2.

The Department anticipates that, in certain instances, potential applicants may be in earlier stages of developing the project(s) to be included in their application. Pre-applications are particularly useful in this scenario. In exceptional cases with compelling national or economic security justification, pre-application feedback may include a preliminary indication that the potential applicant is likely to receive funding for project(s) proposed in the pre-application, contingent on the eventual submission of a complete full application, successful merit review, due diligence, and the future availability of funds.

Any feedback or recommendations provided during the pre-application process are not binding on the potential applicant or the Department.

Full Application: A potential applicant must submit a full application to be officially considered for a CHIPS Incentives Award. The full application will contain extensive, detailed information on the proposed project(s) to enable evaluation of its merits. Because the full application is resource-intensive, the applicant should strongly consider any pre-application feedback when deciding whether to prepare and submit a full application. The Department will engage with the applicant to seek further information or clarifications, provide feedback, including on the scope of the proposed project(s) and the amount of CHIPS Incentives requested, and ultimately, to negotiate the preliminary terms of a potential award.

Before moving into due diligence, the Department will prepare and offer the applicant a non-binding Preliminary Memorandum of Terms.

If a potential applicant has submitted a pre-application, it should not submit a full application until after it receives written feedback on the pre-application.

Due Diligence: If the Department determines that a full application is reasonably likely to receive an award and the Department and the applicant agree, or foresee agreement, on a non-binding Preliminary Memorandum of Terms, the application will enter the comprehensive due diligence phase. In this phase, the Department will require the applicant to provide additional information on national security, financial, environmental, and other issues. The Department intends to initiate its environmental review at this time and will request that the applicant, under the supervision of the Department, prepare required documentation (e.g., a draft environmental assessment or draft environmental impact statement), technical studies and consultations, and provide other information as requested. The Department will engage outside advisors, consultants, and/or attorneys at the due diligence stage, and the applicant will be responsible for their fees and costs. During this process, the Department will be available to discuss with the applicant how such costs may be monitored and controlled.

When the due diligence phase is substantially complete, the Department and the applicant will negotiate the applicable terms of a Long-form Term Sheet for the requested CHIPS Incentives.

The provisions of the Long-form Term Sheet will be more detailed than the Preliminary Memorandum of Terms and may vary from the Preliminary Memorandum of Terms based on the Department’s due diligence, further analysis of the full application, and further negotiations.

Award Preparation and Issuance: If the Department decides to issue a CHIPS Incentives Award or Awards to the applicant, the final award terms are expected to be substantially consistent with the Long-form Term Sheet, subject to the final results of the Department’s due diligence, analysis of the full application and any further negotiations.

The Federal investment from the CHIPS Incentives Program in an individual project may not exceed $3 billion unless it is certified to Congress that the larger investment is necessary to: (1) significantly increase the proportion of reliable domestic supply of semiconductors relevant for national security and economic competitiveness that can be met through domestic production;

and (2) meet the needs of national security.15

10. How will CHIPS Incentives be disbursed?

Disbursements of CHIPS Direct Funding will be tied to project milestones in connection with both the capital expenditure components of the project and the workforce development and/or operational cost components of the project. The period in which these milestones occur will vary by project, depending on the size and complexity of the project and the specific activities funded.

The Department will work with the applicant during the application process to determine the appropriate milestones. The rate of disbursement is generally expected to be proportional to the rate at which non-Federal dollars are expended over the course of the project. CHIPS Loans will similarly be disbursed in tranches aligned with project milestones.

C. Program Priorities The CHIPS Incentives Program seeks to further priorities relating to economic and national security, workforce, and other matters. This section provides information about the program’s priorities. Applicants should develop their applications with these priorities in mind, as they relate to various requirements and evaluative criteria that will form the basis for the

15 15 U.S.C. § 4652(a)(3)(B).

Department’s application review process. Applications that do not meet program priorities will not receive funding.

1. Economic and National Security Objectives Advancing U.S. economic and national security is the principal objective of the CHIPS Incentives Program. The semiconductor industry and its supply chain are critical to the resilience of the U.S. economy. Semiconductors are an essential component in consumer electronics, automobiles, critical infrastructure, and data centers—to name just a few critical uses.

Semiconductors are also a critical input into modern defense systems, and their secure design and reliable availability is necessary for national security.

The Department seeks to invest in operationally secure projects employing appropriate cybersecurity practices, as well as implementing plans to promote supply chain security and risk management. Projects must be protected from internal and external risks ranging from insider threats to disaster recovery and ensure their supply chain is able to continue operations after an incident.

a. Economic Security Objectives The semiconductor supply chain is global, and different elements of the supply chain are geographically concentrated in different regions of the world. This concentration means that a range of risks—from cybersecurity threats to natural disasters to pandemics—have the capacity to disrupt international semiconductor supply chains and damage the U.S. and global economy.

The Department is therefore seeking to invest in projects that meaningfully increase U.S.

semiconductor production and strengthen U.S. and allied supply chains, with a particular emphasis on projects that will mitigate risks from supply chain shocks associated with the geographic concentration of current semiconductor production. To best support supply chain resilience, projects should generally be capable of continued operations for a period of time without access to non-U.S. facilities and personnel.

For leading-edge facilities, the Department is seeking projects that utilize the most advanced commercial technology and produce products most critical to U.S. economic competitiveness.

The Department is focused on the next wave of U.S.-based production, as well as on establishing a virtuous cycle of private-sector investment and innovation that bolsters U.S. competitiveness in the semiconductor industry. As such, the Department will evaluate the extent to which the applicant makes credible commitments of ongoing private investment in the United States. For current-generation and mature-node facilities, the Department is seeking projects that support production of semiconductors critical to U.S. economic security, including, for example, semiconductors used in automobiles, aerospace and defense, medical devices, or other U.S critical infrastructure sectors. To further advance U.S. economic security, the Department seeks to support applications with manufacturing processes that can be converted to produce different types of semiconductors in times of disruption.

The Department will generally favor applications that propose projects with sufficient scale to create long-term commercial sustainability and attract the related investments in suppliers and workforce necessary to engender a productive, efficient, and self-sustaining ecosystem. In order to increase U.S. resilience to potential supply shocks, the Department will also generally favor applications to build foundry capacity that can serve a range of logic customers. In addition, the Department will consider applications for production capacity in industry segments mostly served by integrated device manufacturers (IDMs), including but not limited to memory, analog, mixed-signal, discrete, radio frequency, and compound semiconductors.

The Department also seeks to mitigate risks associated with supply chain concentration through investments in back-end production facilities. In particular, the Department seeks to promote U.S. competitiveness in advanced packaging, which will be critical to future deployments in leading-edge logic technology and manufacturing.

In addition, the Department aims to strengthen supply chain resilience by investing in materials and manufacturing equipment facilities that reduce vulnerabilities associated with geographic concentration, supply-chain bottlenecks, and/or production in foreign countries of concern. The Department also aims to invest in material and manufacturing equipment facilities that advance economic security by locating critical manufacturing know-how in the United States and contributing to the U.S. innovation ecosystem.

The Department recognizes the benefits of collaboration between facilities that are eligible under this NOFO and materials or manufacturing equipment facilities. The Department, accordingly, encourages applicants to take steps to attract associated supplier and other related investments, thus creating a more productive, efficient, and self-sustaining ecosystem and catalyzing future upgrades and expansions. The Department encourages applicants for facilities eligible under this NOFO to consider how their proposed project can spur broader development. Applicants can do this in various ways, such as by identifying plans for key material or manufacturing equipment suppliers to locate in the same area, identifying infrastructure that can benefit the applicant as well as material or manufacturing equipment suppliers, or by incorporating these suppliers in the applicant’s workforce development or R&D commitments.

Relatedly, the Department seeks to support applications for semiconductor materials and manufacturing equipment facilities that help build productive and self-sustaining ecosystems, including by clustering with semiconductor fabrication facilities or otherwise improving the competitiveness and innovativeness of the U.S. semiconductor ecosystem.

b. National Security Objectives By serving as foundational components to U.S. defense and critical infrastructure systems, semiconductors are also vital to U.S. national security. The government organizations and contractors that fulfill national security missions require stable, long-term onshore access to semiconductors. The Department is therefore committed to supporting projects that meet government agencies’ need for access to safe, secure, and domestically produced chips. The Department seeks projects with the ability to adapt commercial production, testing, and packaging models for low-volume and high-mix national security components or to otherwise apply commercial technologies to support national security missions. Finally, the Department seeks applicants that are willing to supply the U.S. government with access to facilities for experimentation, transition, production, and potential integration into national security programs.16

The Department also acknowledges that the risk of malicious disruptions to semiconductors and their supply chains has risen in concert with increased chip complexity, process separation, and outsourcing.17 The evolving threat landscape, coupled with today’s digitized world, provides a large attack surface for adversaries to steal, compromise, alter, or destroy sensitive information that is critical to economic and national security.18 The Department seeks applicants that have made themselves resilient to these attacks, such as by establishing a plan to protect intellectual property and by assuring the security of their supply chain to prevent tampering, counterfeiting, and other security issues. The Department will also prioritize projects capable of mitigating additional operational and cyber security risks, including those posed by insider threats, external influence from foreign entities of concern, dependence on foreign-owned or sourced inputs or equipment, and espionage.

Supply chain security is critical to ensure safe and continued production of semiconductors. The Department seeks projects with demonstrated resilience measures through the protection of physical infrastructure and the supplier ecosystem, and risk management strategies to avoid supply chain exploitation or the loss of intellectual property. Such measures include supply chain stress-test analyses, regular supply chain mapping into second-tier and further suppliers, third-party continuous monitoring, and mandatory supplier redundancy and agility policies.

The Department will also consider the national security risks of the location of any upstream or downstream steps in the manufacturing process, such as packaging.

c. Additional Assistance for Mature Nodes Consistent with the CHIPS Act, the Department will dedicate at least $2 billion from the CHIPS Incentives Program to support production of mature nodes. Recent shortages in available chips at mature nodes led to widespread economic challenges. Shortages were concentrated in a few specific kinds of semiconductor inputs and applications, including legacy logic chips (used in medical devices, automobiles, and other products), analog and mixed-signal chips (used in power management, image sensors, radio frequency, and other applications), and optoelectronics chips (used in sensors and switches). The specific kinds of products with significant semiconductor supply and demand mismatches impacted a wide variety of industries and end users. The Department seeks to promote economic resilience through increased production at mature technology nodes.

16 Note, however, that applications for CHIPS Loans and Loan Guarantees should not include assumptions about the Federal government serving as an off-taker or otherwise providing future funding that will support the financial viability of a project.

17 See The White House, Building Resilient Supply Chains, Revitalizing American Manufacturing, and Fostering Broad-Based Growth (2021).

18 See Department of Commerce and Department of Homeland Security, Assessment of the Critical Supply Chains Supporting the U.S. Information and Communications Technology Industry (2022).

https://www.whitehouse.gov/wp-content/uploads/2021/06/100-day-supply-chain-review-report.pdf…