This is a firm-fixed-price contract awarded by the Shared Services Center, a civilian federal agency, to Microelectronics Research Development Corporation, a small business. The contract is for the development of a radiation-hardened structured ASIC (Application-Specific Integrated Circuit) platform at the 45nm Silicon-on-Insulator (SOI) technology node to enable high-speed, low-power, and small-size ICs for space missions. The contract, valued at $1,499,950.00, is part of the Small Business...
This is a Small Business Innovation Research (SBIR) Program Phase I contract awarded by the National Aeronautics and Space Administration (NASA) to Microelectronics Research Development Corporation (Micro-RDC), a for-profit organization, for the development of a radiation-hardened double data rate (DDR) embedded macro. The objective is to create a cost-effective and quick-turn integrated circuit (IC) digital fabric capable of meeting the demanding requirements of space-based electronic control...
This is a two-phase Small Business Innovation Research (SBIR) program contract awarded by the National Aeronautics and Space Administration (NASA) to Genesic Semiconductor Inc., a minority-owned small business. The $125,000 Phase I contract aims to develop integrated silicon carbide (SiC)-based analog and digital circuits, including SiC power metal-oxide-semiconductor field-effect transistors (MOSFETs), to enable a monolithic, highly integrated gate driver circuit. Key goals include...
This firm fixed-price Small Business Innovation Research (SBIR) Phase I contract, valued at $124,321.00, was awarded by the National Aeronautics and Space Administration (NASA) to Synapticad Sales, Inc., a small disadvantaged business located in Blacksburg, Virginia. The contract aims to adapt Synapticad's commercial digital design simulator, based on the SystemVerilog language, for use in complex NASA space systems and missions. The proposed simulator is intended to scale to large systems,...
This is a Phase II Small Business Innovation Research (SBIR) contract awarded by NASA's Ames Research Center to Accelogic, LLC, a Hispanic American-owned limited liability company located in Fort Lauderdale, Florida. The goal of this $600,000 fixed-price contract is to develop and validate next-generation supercomputing capabilities that can provide NASA and other government/commercial users with significant increases in speed and performance at lower costs and with reduced energy...
This is a $2,199,981.00 cost-plus-fixed-fee contract awarded by the Air Force Research Laboratory (AFRL) to Edaptive Computing Inc., a small business, for the development and verification of tools and processes for application-specific integrated circuits (ASICs) and field-programmable gate arrays (FPGAs). The contract was issued under the Small Business Innovation Research (SBIR) program and is a Phase II action, indicating it builds upon previous SBIR-funded research. Edaptive Computing has...
This is a $149,940 firm fixed price purchase order awarded by the Air Force Research Laboratory (AFRL) to Dsplogic Inc., a small business based in Frederick, Maryland. The contract is for the SBIR (Small Business Innovation Research) Program Phase I development of "INNOVATIVE INTERCONNECTIVITY AND SCHEDULING OF SMART SENSORS AND ACTUATORS". Dsplogic Inc. specializes in FPGA, DSP, and high-performance embedded computing solutions. This contract has a total small business set-aside...
The Department of the Air Force Materiel Command Research Laboratory awarded a definitive contract valued at $749,982 to Graf Research Corporation for research and development of bootstrap verification techniques for field programmable gate arrays. The work will be performed over a 30-month period ending in June 2022 in Blacksburg, Virginia. The firm fixed price contract is set aside for total small businesses and aims to develop tools and methods to verify the trust and integrity of FPGA...
The U.S. Air Force Research Laboratory awarded a $1,482,778.00 Firm Fixed Price contract to Triad Semiconductor Inc., a small business manufacturer, to complete the qualification of a Field Programmable Analog Array (FPAA) design known as Configurable Via-Layer (CVL) technology. This SBIR Phase III effort aims to transition the CVL technology for both commercial and space applications. Key steps include preparing an evaluation of the readiness of the RHV1 Application Specific Integrated...
The National Aeronautics and Space Administration (NASA) awarded a $755,000 Small Business Innovation Research (SBIR) Phase II contract to Pacific Microchip Corp. to develop an application-specific integrated circuit (ASIC) for use in NASA's microwave correlation radiometers. The ASIC will digitize and process the radio frequency (RF) signals from radiometer front-ends, replacing bulky and power-hungry analog signal processing components. Key innovations include programmable digital signal...