SOW_19-9G5_C1_PO_Approved_Redacted.pdf

STATEMENT OF WORK (SOW)

DMEA 19-9G5

24 June, 2019

1.0 SCOPE:

1.1 TITLE: Development of a SOI08 Standard Cell Library and C1004 Gate Array Methodology

1.2 APPLICABILITY: This requirement is applicable to the internal, legacy semiconductor processes at the Defense Microelectronics Activity (DMEA).

1.3 BACKGROUND: For DMEA to provide services as a pure play foundry, process design kits (PDKs) need to be compatible with the latest versions of industry standard tools, and various libraries need to be available for internal and external use. Two DMEA processes of interest include the 0.8m silicon-on-insulator (SOI) semiconductor process (SOI08) and the 1.0m, single poly, dual metal, bulk complementary metal oxide semiconductor (CMOS) process (C1004).

1.4 PURPOSE: The purpose of this SOW is to acquire services to 1) develop a standard cell library (SCL) for the DMEA SOI08 process, and 2) migrate the C1004 gate array process to the latest version of the Cadence platform.

2.0 REFERENCED GOVERNMENT PROVIDED RESOURCES:

2.1 GOVERNMENT FURNISHED INFORMATION:

Nomenclature Date Date Available DMEA C1004 PDK Current Contract Award DMEA C1004 Base Gate Arrays (GDS and DEF Files) Current Contract Award DMEA C1004 Library Exchange Format (LEF) Files Current Contract Award DMEA C1004 Liberty Files Current Contract Award DMEA C1004 Library Cells (GDS Files) Current Contract Award DMEA C1004 Gate Array and Process Documentation Current Contract Award DMEA SOI08 PDK Current Contract Award DMEA SOI08 Rule Decks (DRC/LVS/QRC) Current Contract Award DMEA SOI08 Design Rule Specification Document Current Contract Award DMEA SOI08 Electrical Rule Specification Document Current Contract Award DMEA SOI08 Timing Corner Definitions for SCL Current Contract Award Test Case Register-Transfer Level (RTL) Designs Current Contract Award

2.5 GOVERNMENT FURNISHED FACILITIES/ACCESS:

Facility/Access Date DMEA Building 1 and Building 2 Access As needed

3.0 REQUIREMENTS:

3.1 GENERAL REQUIREMENTS:

3.1.1 RESERVED

3.2 PROGRAM MANAGEMENT:

3.2.1 Documentation: The contractor shall provide all documents in English. The contractor shall deliver all documentation requiring editing in Microsoft Word or Microsoft Excel format. The contractor shall provide all documents to be reviewed between Cadence and the Government in Microsoft Word, Microsoft Excel, or portable document format (PDF).

3.2.2 Communication Plan: The contractor shall provide a document defining the frequency, timing, agenda, logistics, and attendance of status updates with technical interchange meetings (TIMs) via regularly scheduled teleconferencing. The contractor shall also define the frequency, format, timing, and distribution list for regularly scheduled delivery of status report documents. The contractor shall additionally define the schedule / attendance for joint management meetings and the schedule / agenda / attendance for project reviews. (A001)

3.2.3 Technical Interchange Meetings (TIMs): The contractor shall have a kick-off meeting with the Government to review the project team organization, baseline schedule, Communication Plan, SOW, and status of all 3rd party data dependencies. The contractor shall conduct other TIMs as necessary in the performance of this task. The TIM with the contractor shall be scheduled when there is need for technical interchange between the Government and the contractor. The content of the meeting can include the discussion of any information that has impact upon the task activities including documentation contents or format. (A002)

3.2.4 Status Reports: The contractor shall provide a summary status based on the agreed upon Communication Plan.

The contractor shall include, at a minimum, schedule performance, actions log, deliverables log, accomplishments for the corresponding period, and planned activities for the next period. (A003)

3.2.5 International Traffic in Arms Regulations (ITAR) Requirement: The contractor shall ensure ITAR compliance with this task. The contractor shall verify citizenship status for each employee assigned to this task. The contractor shall allow only United States (U.S.) Persons as defined in 22 CFR 120.15 to work on this task. The contractor shall provide instruction on ITAR security for each assigned employee. The contractor shall establish a secure computer chamber with access granted solely to assigned employees who have been verified as U.S. citizens. The contractor shall exercise and confirm a “clean desk” policy for handling hardcopy data. The contractor shall provide instruction on the handling and storing of hardcopy data to assigned employees. The contractor shall store all data in a locked desk or cabinet when not actively in use. The contractor shall properly shred and dispose of any hard copy material when it is no longer needed. The contractor shall establish a secure method of data transfer between the contractor and the Government. The contractor shall provide tracking and deletion of data upon project completion.

3.3 TASK REQUIREMENTS:

3.3.1 Standard Cell Library Development for the DMEA SOI08 Process: The contractor shall develop a standard cell library using the BHGATE structure of the 0.8m SOI semiconductor process at DMEA. (A004)

The cells to be developed are listed below.

Cell Family Drives

INV X1, X2, X4, X8

BUF X1, X2, X4, X8

NAND2 X1, X2, X4

NAND3 X1, X2, X4

NAND4 X1, X2, X4

AND2 X1, X2, X4

AND3 X1, X2, X4

AND4 X1, X2, X4

NOR2 X1, X2, X4

NOR3 X1, X2, X4

NOR4 X1, X2, X4

OR2 X1, X2, X4

OR3 X1, X2, X4

OR4 X1, X2, X4

MUX2 X1, X2, X4

MUX3 X1, X2, X4

Cell Family (continued) Drives (continued)

MUX4 X1, X2, X4

OAI22 X1, X2, X4

AOI22 X1, X2, X4

XOR X1, X2, X4

XNOR X1, X2, X4

FILL X1, X2, X4, X8, X16

DFFR X1

DFFS X1

DFFSR X1

Clock Buffers X1, X2, X4, X8 Delay Cells X1, X2, X4, X8 Clock Gating X1, X2, X4, X8 Scan Flops R, S, SR

For each cell, the following views shall be developed.

View Variant Design Framework II (DFII) Schematic

Symbol Layout Abstract

Library Exchange Format (LEF) Cell Library LEF Technology LEF

Liberty Views for Specified Process, Voltage, and Temperature (PVT) Corners

Timing Power

3.3.1.1 Standard Cell Library Characterization: The contractor shall perform characterization corresponding to the seven (7) process, voltage, and temperature (PVT) corners listed below.

Process (n-ch xtr /p-ch xtr)

Supply Ambient

Temperature 1 typical / typical 5V nominal (25°C) 2 typical / typical 3.6V nominal (25°C) 3 fast / slow 5V nominal (25°C) 4 slow / fast 5V nominal (25°C) 5 fast / fast 5.5V low (-55°C) 6 slow / slow 4.5V high (125°C) 7 slow / slow 2.6V high (125°C)

3.3.1.2 Standard Cell Validation: The contractor shall validate the standard cell library with implementation of DMEA supplied test case RTL using Cadence digital design tools. The Cadence digital design tools include Genus, Innovus, Tempus, PVS, Assura, and Conformal.

3.3.2 Gate Array Methodology Development for the DMEA C1004 Process: The contractor shall develop a gate array methodology for the DMEA C1004 process that is compatible with the Cadence IC6.1.x toolset. This includes updating the techFile to IC6.1.x with Mixed-Signal OpenAcess (MSOA) support, importing and updating the standard cell library cells for IC6.1.x, updating the cell library and technology LEF files to be compatible with the latest version of Innovus, and ensuring the base gate arrays are compatible with the latest version of Innovus. The contractor shall also provide documentation for the design flow and implementation reference scripts. The PDK and gate array flow will be validated with DMEA supplied test case RTL. (A005)

The contractor shall deliver the following items summarized in the table below.

Category Component PDK Components for IC6.1.x Technology Files display.drf Design Framework (DFII) Libraries Base Gate Array Structures

Gate Array Cells Library Exchange Format (LEF) / Innovus Technology Data

Cell Library LEF Technology LEF

Associated Documentation Test Case Data Design Flow Documentation Implementation Reference Scripts

3.5 PROGRAM SUMMARY: None.

4.0 POINTS OF CONTACT:

DMEA/MEBB:

Address: 4234 54th Street McClellan, CA 95652-2100 Voice:

E-Mail: