SOW.pdf
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- Silicon-on-insulator wafers
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- 80NSSC18P1087Q
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SOW
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STATEMENT OF WORK
Silicon-on-insulator wafers
PR: 4200654179
Background
The GSFC Detector Development Laboratory (DDL) has a requirement to acquire Silicon on Insulator (SOI) wafers with ultrathin, high thickness uniformity, low defect density, device layers. The SOI wafers are required as starting materials for the fabrication of cryogenic detectors and for development and fabrication of infrared optical components. SOI wafers consist of a thin single crystal silicon device layer bonded to a single crystal silicon handle wafer by a silicon oxide layer or buried oxide.
Scope The silicon on insulator wafers are critical starting materials for fabrication of ultra-sensitive high efficiency microwave detectors for astrophysics applications and as materials for mid to long infrared cryogenic optics components. The critical part of the SOI wafer for our application is the device layer. In particular, single crystal silicon with low defect density and high resistivity > 500 ohm-cm device layers (non compensated doping) are required to ensure minimal signal absorption due to carrier (electron, phonon or photon) scattering. High thickness uniformity is required to ensure minimal variation in detector performance for large detector arrays, minimal performance spread for smaller detector arrays thus improving fabrication yield and to enable large diameter cryogenic optical components. We require ultrathin and ultra uniform (95 nm +/- 10 nm) device layers for low thermal conductance materials and to use as starting materials for subsequent high purity epitaxial growth to greater specified thicknesses. The wafer requirements are listed below.
Requirements
1. Specifications
- Wafer diameter: 200mm +/- 0.2 mm
- Handle wafer thickness: 725mm +/- 25 um
- Handle wafer backside finish: with backside silicon oxide
- Buried oxide thickness: 400 nm +/- 5%
- Device layer thickness: 95 nm +/- 10 nm
- Device layer resistivity: > 500 ohm-cm (non compensated)
- Device layer doping: boron (p-type)
- Device layer silicon growth method: (100) Float Zone (FZ) preferred but
(100) CZ acceptable with minimal oxide impurities – COP free TTV < 5um, Warp < 50 um, Bow < 50 um
Acceptance
1. Deliver complete specified (as described above).
Deliverables or Delivery Schedule
1. Schedule - Delivery within 3.5 months after receipt of order.
Government-Furnished Equipment and Government-Furnished Information
• none
Place of Performance
• The wafers will be built at the contractor facility, however, the final acceptance, will be at GSFC.
Period of Performance
• From receipt to delivery 3.5months after order receipt.
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