Project Grant 2318807

Award Date 9/1/23
Completion Date 8/31/26
Dollars Obligated $385K
Federal Grant Program
47.041
Assistance Type
Project Grant
Place of Performance
Evanston, IL 60208, USA
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  1. Improving the integration process between n-FeFET, p-FeFET, and CMOS devices to enable better technology fusion.
  2. Developing a joint device-circuit collaborative design flow to tailor FeFET technology for emerging computing applications.
  3. Creating novel circuits and architectures that utilize FeFET as both memory and computing devices.
  4. Demonstrating complex processors and accelerators that integrate CMOS and FeFET technologies.

This award, funded through the NSF Engineering program (CFDA 47.041), aims to establish a solid foundation for future FeFET developments in support of emerging, high-performance computing needs.

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