This $174,705 project grant from the National Science Foundation's Computer and Information Science and Engineering program (CFDA 47.070) supports research at the Rochester Institute of Technology to develop a design space modeling framework for logic obfuscation configuration in integrated circuits. The goal is to automate identification of effective allocations of obfuscation resources that maximize system-wide security with minimal design overhead. Key products include quantifiable security metrics for obfuscation, an open-source design space modeling framework, and verification of generated models. This work addresses the need for secure computer chips in trusted applications like healthcare and defense by lowering barriers to incorporating logic obfuscation through automation. Research opportunities for students are also part of the project scope.
Generated 1/6/24, 6:22 PM