Project Grant 2245247

Award Date 3/15/23
Completion Date 2/28/25
Dollars Obligated $173K
Federal Grant Program
47.070
Assistance Type
Project Grant
Place of Performance
Long Beach, CA 90840, USA
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The project aims to develop a comprehensive hardware security and reliability framework in two phases. First, the investigator and research team will examine EFPGA-based approaches to make integrated circuits secure against logic locking attacks as well as mitigate hardware trojans and tolerate faults at runtime. Second, the team will propose dynamic key schemes with multi-level activation and functional stages to offer high degrees of logic locking security, hardware trojan mitigation, and fault tolerance with minimal area and power overhead. Outcomes will include publications, an open-source design automation tool to generate provably secure netlists considering different hardware security requirements, and increased participation in science and engineering fields by underrepresented groups.

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