X-RAY speed-reading: integrated readout technology for fast, very low-noise, megapixel x-RAY imaging detectors

Active Grant For Research Awarded Last action

Contract number
80NSSC22K1921
Awardee
Awarding agency
Obligated
$1,376,963

Award facts

Contract value 100% obligated
$1,376,963.00 Current and potential, with all options
Completion date 95% complete
Current and potential, with all options
NAICS code
Not on record
Set-aside
No set-aside
Competition
Full and Open Competition Basic Research
Pricing
Other
Place of performance
Palo Alto, CA 94305, USA

Award details come from SAM.gov/FPDS.

Transactions

Action Obligated Date
Other Administrative Action P00007 $0
Funding Only Action P00006 $297,270
Funding Only Action P00005 · In our previous efforts, we have also studied a novel CCD output stage concept dubbed the single electron sensitive readout (sisero). We have recently… $200,000
Funding Only Action P00004 $312,000
Funding Only Action P00003 $155,485
Funding Only Action P00002 · In our previous efforts, we have also studied a novel CCD output stage concept dubbed the single electron sensitive readout (sisero). We have recently… $312,000
Other Administrative Action P00001 · 21-APRA21-0021, x-RAY speed-reading: integrated readout technology for fast, very low-noise, megapixel x-RAY imaging detectors $0
Original award $100,208

About this award

The Leland Stanford Junior University received a $1.38 million research grant awarded January 1, 2023, by a civilian federal agency through its Shared Services Center. The grant supports the development of advanced X-ray imaging detector technology, specifically focusing on integrated readout systems for fast, low-noise, megapixel X-ray detectors. The project builds upon Stanford's previous work on Single Electron Sensitive Readout (SISERO) technology and the Multi-Channel Readout Chip (MCRC) platform. The research aims to achieve subelectron noise performance through six key improvements to the MCRC readout platform, including hybrid integration with external analog-to-digital converters, integration of high-voltage clock drivers, detector bias generators, enhanced housekeeping and monitoring functions, front-end temperature and bias condition capture, and performance improvements to the drain readout scheme compatible with JFET-based charge-coupled devices.

The contract is structured around two Application Specific Integrated Circuit (ASIC) manufacturing submissions, with work scheduled for completion by December 31, 2026. The first submission will produce test structures integrated into the existing MCRC V1.0 padframe with eight channels, each testing different component features and performance improvements using current test systems. The second submission will leverage the most successful candidates from the initial submission to produce an enhanced MCRC V2.0 chip with expanded capabilities. The award was made without set-aside designation, indicating open competition. This research supports Stanford's substantial portfolio in advanced detector technology and quantum sensing applications, positioning the university as a key contributor to federal instrumentation development initiatives.

Quick answers

Who was awarded contract 80NSSC22K1921?

80NSSC22K1921 was awarded to The Leland Stanford Junior University by Shared Services Center (National Aeronautics and Space Administration) on January 1, 2023.

How much is contract 80NSSC22K1921 worth?

The government has obligated $1,376,963 on 80NSSC22K1921.

Was contract 80NSSC22K1921 competed?

The extent of competition for 80NSSC22K1921 was full and open competition.

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