RFQ_0006398_Questions_Answers.pdf
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- Attached to
- PCIe Ethernet Tap Federal contract opportunity
- Solicitation number
- RFQ0006398
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| File | Type | Posted |
|---|---|---|
| RFQ_DJF-16-1800-PR-0006398_PCIe_Ethernet_Tap.pdf |
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RFQ 0006398
Date April 4, 2016
Questions/Answers:
1. Would the government consider changing the NAICS code to: 334118, Computer Terminal and other Computer Peripheral Equipment Manufacturing? With over half of the work involving actual manufacturing of a computer peripheral product, we believe this would be an applicable NAICS code. Small business standard is 1,000 employees.
a. At this time, if you wish to provide a quote, please do so.
2. Is there a preferred format or specific required information for past performance response?
a. Required information is:
The Offeror shall identify two (2) contracts/task orders with the Federal Government and/or commercial customers that demonstrate recent and relevant past performance. Recent is defined as within the last three years.
Include the following information:
(1) Project title
(2) Description of the project
(3) Contract number
(4) Contract amount
(5) Government Agency/Organization
(6) Contract and, if applicable, task order number
(7) Current status, e.g., completed and/or if in progress, start and estimated completion dates
(8) Dollar value and type of contract
(9) Name of company being referenced
3. Is there a page limit on the technical proposal?
a. No more than 10 pages to include your quote.
4. Does the PS memory need to support ECC?
a. No, there is no requirement for ECC memory
5. Could more information be provided on the FPGA flash memory? Is it static? I/F and Capacity?
a. There is no requirement to store user information in the FPGA flash memory - it is provided to configure the FPGA on power-up, and must be sized appropriately for that purpose.
In addition, as specified, the configuration must be done in a "tandem" method as defined by Xilinx, where the PCIe endpoint functionality is enabled within the PCIe startup time, and the remainder of the FPGA will be configured afterward in a manner as specified by Xilinx.
Provided the tandem boot & FPGA configuration is successfully performed at power-up, any additional memory space in the flash memory device may be made available and used as the vendor sees fit.
Response date remains unchanged.
File details come from the government source that posted it. Updated .