Page 3 Architectures

Added: Sep 13, 2017 12:40 pm Modified: Oct 18, 2017 2:41 pmTrack Changes Amendment 02: The purpose of this amendment is to correct a typographical error in the abstract details on page 41. See the attached conformed BAA with changes highlighted in yellow.

Amendment 01: The purpose of this amendment is to make administrative changes as highlighted in yellow in the attached.

Original Synopsis Below:
DARPA is soliciting innovative research proposals in the area of novel computing architectures. The Page 3: Architectures thrust of the Electronics Resurgence Initiative (ERI) seeks to demonstrate heterogeneous computing systems that provide the performance advantages of specialized processors, while maintaining the programmability of general purpose processors.

The goal of the Software Defined Hardware (SDH) program is to build runtime-reconfigurable hardware and software that enables near ASIC performance without sacrificing programmability for data-intensive algorithms. SDH will create a hardware/software system that allows data-intensive algorithms to run at near ASIC efficiency without the cost, development time or single application limitations associated with ASIC development.

The overall goal of the Domain-specific System on Chip (DSSoC) program is to develop a heterogeneous SoC comprised of many cores that mix general-purpose processors, special-purpose processors, hardware accelerators, memory, and input/output (I/O). DSSoC seeks to enable rapid development of multi-application systems through a single programmable device.

**Updated NAICS Code only.**

Added: Sep 13, 2017 12:40 pm Modified: Oct 05, 2017 4:00 pmTrack Changes Amendment 02: The purpose of this amendment is to correct a typographical error in the abstract details on page 41. See the attached conformed BAA with changes highlighted in yellow.

Amendment 01: The purpose of this amendment is to make administrative changes as highlighted in yellow in the attached.

Original Synopsis Below:
DARPA is soliciting innovative research proposals in the area of novel computing architectures. The Page 3: Architectures thrust of the Electronics Resurgence Initiative (ERI) seeks to demonstrate heterogeneous computing systems that provide the performance advantages of specialized processors, while maintaining the programmability of general purpose processors.

The goal of the Software Defined Hardware (SDH) program is to build runtime-reconfigurable hardware and software that enables near ASIC performance without sacrificing programmability for data-intensive algorithms. SDH will create a hardware/software system that allows data-intensive algorithms to run at near ASIC efficiency without the cost, development time or single application limitations associated with ASIC development.

The overall goal of the Domain-specific System on Chip (DSSoC) program is to develop a heterogeneous SoC comprised of many cores that mix general-purpose processors, special-purpose processors, hardware accelerators, memory, and input/output (I/O). DSSoC seeks to enable rapid development of multi-application systems through a single programmable device.

Added: Sep 13, 2017 12:40 pm Modified: Sep 19, 2017 3:40 pmTrack Changes Amendment 01: The purpose of this amendment is to make administrative changes as highlighted in yellow in the attached.

Original Synopsis Below:
DARPA is soliciting innovative research proposals in the area of novel computing architectures. The Page 3: Architectures thrust of the Electronics Resurgence Initiative (ERI) seeks to demonstrate heterogeneous computing systems that provide the performance advantages of specialized processors, while maintaining the programmability of general purpose processors.

The goal of the Software Defined Hardware (SDH) program is to build runtime-reconfigurable hardware and software that enables near ASIC performance without sacrificing programmability for data-intensive algorithms. SDH will create a hardware/software system that allows data-intensive algorithms to run at near ASIC efficiency without the cost, development time or single application limitations associated with ASIC development.

The overall goal of the Domain-specific System on Chip (DSSoC) program is to develop a heterogeneous SoC comprised of many cores that mix general-purpose processors, special-purpose processors, hardware accelerators, memory, and input/output (I/O). DSSoC seeks to enable rapid development of multi-application systems through a single programmable device.

Added: Sep 13, 2017 12:40 pm DARPA is soliciting innovative research proposals in the area of novel computing architectures. The Page 3: Architectures thrust of the Electronics Resurgence Initiative (ERI) seeks to demonstrate heterogeneous computing systems that provide the performance advantages of specialized processors, while maintaining the programmability of general purpose processors.

The goal of the Software Defined Hardware (SDH) program is to build runtime-reconfigurable hardware and software that enables near ASIC performance without sacrificing programmability for data-intensive algorithms. SDH will create a hardware/software system that allows data-intensive algorithms to run at near ASIC efficiency without the cost, development time or single application limitations associated with ASIC development.

The overall goal of the Domain-specific System on Chip (DSSoC) program is to develop a heterogeneous SoC comprised of many cores that mix general-purpose processors, special-purpose processors, hardware accelerators, memory, and input/output (I/O). DSSoC seeks to enable rapid development of multi-application systems through a single programmable device.