RFI Specs.pdf

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Attached to
VPX I/O Cards Federal contract opportunity
Solicitation number
N6449823Q5137
Issued by
Department of the Navy Naval Sea Systems Command

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SOW-PWS Template 21 November 2022 version Page 1

Specification for I/O Cards

3.0. REQUIREMENTS

Contractor shall provide the following hardware and software components that meet or exceed the specifications defined below. The I/O Cards listed below shall be compatible with VPX specifications.

3.1 Qty. 65; 3U OpenVPX I/O and Communications Board Configured With A/D Modules:

Support for three independent, smart function modules Independent x1 SerDes interface to each function module slot VPX / OpenVPX (ANSI / VITA 46 & VITA 65): Module profile: MOD3-PER-1U-

16.3.3-2 VPX / OpenVPX (ANSI / VITA 46 & VITA 65): Slot profile: SLT3-PER-1U-14.3.3 PCIe (x1) Control via Gig-E or PCIe interface Connections via front panel, rear panel, or both Background Built-In-Test (BIT) continually checks and reports on the health of each channel Software Support Kits (SSKs) and drivers available Designed to meet ANSI / VITA 47 environmental requirements Module 1 = 16 Channels A/D, ± 10 V, 25 mA Per Channel, Current or Voltage

Control, Multiplexed, 500 KHz Agg / 8 Ch, SAR Module 2 = 16 Channels A/D, ± 10 V, 25 mA Per Channel, Current or Voltage

Control, Multiplexed, 500 KHz Agg / 8 Ch, SAR Module 3 = 16 Channels A/D, ± 10 V, 25 mA Per Channel, Current or Voltage

Control, Multiplexed, 500 KHz Agg / 8 Ch, SAR Front Panel (5HP, 1.0" pitch) and Rear I/O, includes mating connector kit(s) -40°C to +85°C with Conformal Coating MB Port A (10/100/1000Base-T) to Front & Port B (1000Base-KX (SerDes)

Interface) to Rear No Hi-speed Serial Switched Fabric Interface (Ethernet Only) IPMC function option (VITA 46.11 Tier 2 compliant; basic) 270-deg insert for the alignment sockets (both sides) on any/all configurations

3.2 Qty. 38; 3U OpenVPX I/O and Communications Board Configured With Resistance Temperature Detectors (RTD) Modules:

Support for three independent, smart function modules Independent x1 SerDes interface to each function module slot VPX / OpenVPX (ANSI / VITA 46 & VITA 65): Module profile: MOD3-PER-1U-

16.3.3-2 VPX / OpenVPX (ANSI / VITA 46 & VITA 65): Slot profile: SLT3-PER-1U-14.3.3 PCIe (x1) Control via Gig-E or PCIe interface Connections via front panel, rear panel, or both

SOW-PWS Template 21 November 2022 version Page 2

Background Built-In-Test (BIT) continually checks and reports on the health of each channel

Software Support Kits (SSKs) and drivers available Designed to meet ANSI / VITA 47 environmental requirements Module 1 = 8 Channels Resistance Temperature Detectors (RTD), 2, 3, or 4 wire, 16

Bit Res, 16.7 Hz/Ch Module 2 = 8 Channels Resistance Temperature Detectors (RTD), 2, 3, or 4 wire, 16

Bit Res, 16.7 Hz/Ch Module 3 = 8 Channels Resistance Temperature Detectors (RTD), 2, 3, or 4 wire, 16

Bit Res, 16.7 Hz/Ch Front Panel (5HP, 1.0" pitch) and Rear I/O, includes mating connector kit(s) -40°C to +85°C with Conformal Coating MB Port A (10/100/1000Base-T) to Front & Port B (1000Base-KX (SerDes)

Interface) to Rear No Hi-speed Serial Switched Fabric Interface (Ethernet Only)

3.3 Qty. 15; 3U OpenVPX I/O and Communications Board Configured With D/A Module:

Independent x1 SerDes interface to each function module slot VPX / OpenVPX (ANSI / VITA 46 & VITA 65): Module profile: MOD3-PER-1U-

16.3.3-2 VPX / OpenVPX (ANSI / VITA 46 & VITA 65): Slot profile: SLT3-PER-1U-14.3.3 PCIe (x1) Control via Gig-E or PCIe interface Connections via front panel, rear panel, or both Background Built-In-Test (BIT) continually checks and reports on the health of each channel Software Support Kits (SSKs) and drivers available Designed to meet ANSI / VITA 47 environmental requirements Module 1 = 12 Channels D/A, ± 10 V, 25 mA Per Channel, Current or Voltage

Control Module 2 = Spare Module Slot Module 3 = Spare Module Slot Front Panel (5HP, 1.0" pitch) and Rear I/O, includes mating connector kit(s) -40°C to +85°C with Conformal Coating MB Port A (10/100/1000Base-T) to Front & Port B (1000Base-KX (SerDes)

Interface) to Rear No Hi-speed Serial Switched Fabric Interface (Ethernet Only)

3.4 Qty. 148; 3U OpenVPX I/O and Communications Board Configured With Discrete I/O

Modules:

SOW-PWS Template 21 November 2022 version Page 3

Independent x1 SerDes interface to each function module slot VPX / OpenVPX (ANSI / VITA 46 & VITA 65): Module profile: MOD3-PER-1U-

16.3.3-2 VPX / OpenVPX (ANSI / VITA 46 & VITA 65): Slot profile: SLT3-PER-1U-14.3.3 PCIe (x1) Control via Gig-E or PCIe interface Connections via front panel, rear panel, or both Background Built-In-Test (BIT) continually checks and reports on the health of each channel Software Support Kits (SSKs) and drivers available Designed to meet ANSI / VITA 47 environmental requirements Module 1 = 24 Channels Discrete I/O, 0-60 VDC Input/Output, Max Iout 500 mA - 2

A, Source/Sink (out) Module 2 = 24 Channels Discrete I/O, 0-60 VDC Input/Output, Max Iout 500 mA - 2

A, Source/Sink (out) Module 3 = 24 Channels Discrete I/O, 0-60 VDC Input/Output, Max Iout 500 mA - 2

A, Source/Sink (out) Front Panel (5HP, 1.0" pitch) and Rear I/O, includes mating connector kit(s) -40°C to +85°C with Conformal Coating MB Port A (10/100/1000Base-T) to Front & Port B (1000Base-KX (SerDes)

Interface) to Rear No Hi-speed Serial Switched Fabric Interface (Ethernet Only)

3.5 Qty. 39; 3U OpenVPX I/O and Communications Board Configured With Serial Comms or GPIO Modules:

Support for three independent, smart function modules Independent x1 SerDes interface to each function module slot VPX / OpenVPX (ANSI / VITA 46 & VITA 65): Module profile: MOD3-PER-1U-

16.3.3-2 VPX / OpenVPX (ANSI / VITA 46 & VITA 65): Slot profile: SLT3-PER-1U-14.3.3 PCIe (x1) Control via Gig-E or PCIe interface Connections via front panel, rear panel, or both Background Built-In-Test (BIT) continually checks and reports on the health of each channel Software Support Kits (SSKs) and drivers available Designed to meet ANSI / VITA 47 environmental requirements Module 1 = 8 Channels (max) RS-232/422/485 Serial Comms or GPIO, Programmable, Non-isolated Module 2 = 8 Channels (max) RS-232/422/485 Serial Comms or GPIO, Programmable, Non-isolated

SOW-PWS Template 21 November 2022 version Page 4

Module 3 = 8 Channels (max) RS-232/422/485 Serial Comms or GPIO, Programmable, Non-isolated

Front Panel (5HP, 1.0" pitch) and Rear I/O, includes mating connector kit(s) -40°C to +85°C with Conformal Coating MB Port A (10/100/1000Base-T) to Front & Port B (1000Base-KX (SerDes)

Interface) to Rear No Hi-speed Serial Switched Fabric Interface (Ethernet Only)

3.6 Qty. 915; 44PIN DEVELOPMENT Board to interface with 3U OpenVPX I/O and

Communications Board listed above

3.7 Qty. 305; 50PIN Development Cable Kit to interface with 44PIN DEVELOPMENT

Board to interface with 3U OpenVPX I/O and Communications Board listed above

File details come from the government source that posted it. Updated .