HR001119S0016-Amendment-01.pdf

HR001119S0016

Microsystems Technology Office Broad Agency Announcement

Technologies for Mixed-mode Ultra Scaled Integrated Circuits

(T-MUSIC)

HR001119S0016

January 4, 2019

Amendment 01: As amended on January 14, 2019

Foreword In June 2017, the Defense Advanced Research Projects Agency (DARPA) announced the Electronics Resurgence Initiative (ERI), a five-year, upwards of $1.5B investment in the future of domestic, U.S. Government (USG), and Department of Defense (DoD) electronic systems.

ERI recognizes and addresses long-foreseen obstacles to Moore’s Law – the transistor scaling trend that has allowed for 50 years of rapid progress in electronics. To address these issues, ERI kicked off a major investment that draws on the contributions of several ongoing DARPA programs and creates new, long-term technology investments. Through novel research and development (R&D) in semiconductor materials and integration, architectures, and designs, ERI programs will promote circuit specialization as a complement to transistor scaling. The success of these efforts will depend on constructively enmeshing the technology needs and capabilities of the defense enterprise with the commercial and manufacturing realities of the electronics industry.

The first annual ERI Summit, held in July 2018, featured four workshops designed to generate ideas for future ERI programs. Three key issues emerged from the workshop discussions: the need to support domestic manufacturing options and enable them to develop differentiated capabilities for diverse needs; a demand to invest in chip security; and a desire to create new connections between the various ERI programs and to demonstrate the resulting technologies in defense applications. ERI Phase II will build on the existing ERI programs to address all of these challenges, with the goal of supporting a domestic semiconductor manufacturing industry that can implement specialized circuits, demonstrate that those circuits can be trusted through the supply chain and are built with security in mind, and are ultimately available to both DoD and commercial sector users.

To create unique and differentiated domestic manufacturing capabilities, potential areas of exploration in ERI Phase II include the integration of photonics and radiofrequency (RF) components directly into advanced circuits and semiconductor manufacturing processes.

DARPA has announced the Photonics in the Package for Extreme Scalability (PIPES) and Technologies for Mixed-mode Ultra Scaled Integrated Circuits (T-MUSIC) within this area. To provide for trustable electronics components, potential Phase II areas of exploration include electronics that can enforce security and privacy protections as well as technologies to enable traceability for electronic components from design through to use. DARPA has announced Guaranteed Architecture for Physical Security (GAPS) within this area.

To integrate mixed mode electronics into advanced onshore semiconductor manufacturing processes in ERI Phase II, the Technologies for Mixed mode Ultra Scaled Integrated Circuits (T- MUSIC) program will advance the underlying technology for RF transistors and circuits in CMOS and SiGe that has been left behind by traditional digital CMOS scaling. The DoD has capability demands that far exceed the requirements of the commercial world in terms of speed, fidelity, capacity, and precision. These characteristics directly impact the performance and differentiation on essentially all DoD electronic systems in advanced RF sensors and high capacity communications. T-MUSIC will also provide an advantage for US-based foundries as leading suppliers of commercial wireless system-on-a-chip (SoC) integrated circuits. T-MUSIC will provide the foundation for enduring U.S. leadership in mixed-mode electronics technology by developing next-generation terahertz (THz) mixed-mode devices based on the advanced CMOS fabrication platform.

Together with the ongoing ERI programs, including the “ERI Page 3 Investments” announced in 2017, ERI Phase II is the next step in creating a more robust, secure, and heavily automated electronics industry that will provide a foundational contribution both to U.S. national security and to the needs and ambitions of the commercial sector, with new capabilities emerging in the 2025 to 2030 timeframe. DARPA is eager to receive proposals from entities that can help to achieve this goal. For further reference, an updated list of ERI programs, solicitations, and events is available via https://www.darpa.mil/work-with-us/electronics-resurgence-initiative.

https://www.darpa.mil/work-with-us/electronics-resurgence-initiative

Table of Contents

PART I: OVERVIEW INFORMATION

PART II: FULL TEXT OF ANNOUNCEMENT

I. Funding Opportunity Description A. Background B. Program Description C. Program Structure D. Technical Areas

1. Technical Area 1 (TA-1): Ultra-broadband Mixed-Mode Foundry Technology

2. Technical Area 2 (TA-2): Advanced THz Mixed-Mode Devices E. Schedule/Milestones/Deliverables F. Additional Deliverables G. Government Furnished Equipment/Property/Information H. Intellectual Property

II. Award Information A. General Award Information B. Fundamental Research

III. Eligibility Information A. Eligible Applicants

1. Federally Funded Research and Development Centers (FFRDCs) and Government Entities

B. Organizational Conflicts of Interest C. Cost Sharing/Matching D. Associate Contractor Agreement Clause

IV. Application and Submission Information A. Address to Request Application Package B. Content and Form of Application Submission

1. Abstract Format

2. Full Proposal Format

3. Proprietary Information

4. Security Information

a. Program Security Information

b. Unclassified Submissions

5. Disclosure of Information and Compliance with Safeguarding Covered Defense

Information Controls

6. Human Research Subjects/Animal Use

7. Approved Cost Accounting System Documentation

8. Section 508 of the Rehabilitation Act (29 U.S.C. § 749d)/FAR 39.2

9. Grant Abstract

10. Small Business Subcontracting Plan

11. Intellectual Property

a. For Procurement Contracts

b. For All Non-Procurement Contracts

12. Patents

13. System for Award Management (SAM) and Universal Identifier Requirements

14. Funding Restrictions C. Submission Information

1. Submission Dates and Times

a. Abstract Due Date

b. Full Proposal Date

c. Frequently Asked Questions (FAQ)

2. Abstract Submission Information

3. Proposal Submission Information

a. For Proposers Requesting Grants or Cooperative Agreement (TA-2 Only):

b. For Proposers Requesting Contracts or Other Transaction Agreements

c. Classified Submission Information

4. Other Submission Requirements

V. Application Review Information A. Evaluation Criteria

1. Overall Scientific and Technical Merit

2. Potential Contribution and Relevance to the DARPA Mission

3. Cost and Schedule Realism

B. Review and Selection Process

1. Review Process

2. Handling of Source Selection Information

3. Federal Awardee Performance and Integrity Information (FAPIIS)

VI. Award Administration Information A. Selection Notices

1. Abstracts

2. Proposals

B. Administrative and National Policy Requirements

1. Meeting and Travel Requirements

2. FAR and DFARS Clauses

3. Controlled Unclassified Information (CUI) on Non-DoD Information Systems

4. Representations and Certifications

5. Terms and Conditions

C. Reporting D. Electronic Systems

1. Wide Area Work Flow (WAWF)

2. i-Edison

VII. Agency Contacts VIII. Other Information

A. Proposers Day B. Protesting

ATTACHMENT 1: Cost Volume Proposer Checklist ATTACHMENT 2: Proposal Summary Slide Template

PART I: OVERVIEW INFORMATION

Federal Agency Name: Defense Advanced Research Projects Agency (DARPA), Microsystems Technology Office (MTO)

Funding Opportunity Title: Technologies for Mixed-mode Ultra Scaled Integrated Circuits (T-MUSIC)

Announcement Type: Initial Announcement Funding Opportunity Number: HR001119S0016 Catalog of Federal Domestic Assistance Numbers (CFDA): 12.910 Research and

Technology Development Dates: (All times listed herein are Eastern Time) o Posting Date: January 4, 2019 o Proposers Day: January 8, 2019 o Abstract Due Date: January 25, 2019 – 1:00 PM EST o FAQ Submission Deadline: February 18, 2019 – 1:00 PM EST o Proposal Due Date: March 12, 2019 – 1:00 PM EST o Estimated period of performance start: August 2019

Concise description of the funding opportunity: The DARPA Microsystems Technology Office is soliciting research proposals for the development of advanced RF mixed-mode foundry processes, building blocks, and novel high frequency mixed-mode devices on a CMOS fabrication platform. It is expected that such advances will enable new DoD applications including high capacity, robust communications, radars, and precision sensors.

Anticipated Funding Available for Awards: Approximately $70M of funding is anticipated for awards made against this BAA, with a distribution of:

o $55M for Technical Area 1 (TA-1) including TA-1A and TA-1B o $15M for Technical Area 2 (TA-2)

Anticipated individual awards: Multiple awards are anticipated. TA-1A is considered to be a large portion of the overall program effort and it is expected that at most two large awards will be made in this technical area. It is expected that multiple smaller awards will be made targeted to both TA-1B circuit demonstrations and TA-2 exploratory work.

Anticipated funding type:

o 6.3 for TA-1A o 6.2 for TA-1B o 6.2 for TA-2

Types of instruments that may be awarded:

o TA-1A and TA-1B: Procurement contract or other transaction.

o TA-2: Procurement contract, grant, cooperative agreement, or other transaction.

Agency contact:

o Dr. Young-Kai Chen, Program Manager

BAA Coordinator: HR001119S0016@darpa.mil

DARPA/MTO

ATTN: HR001119S0016

675 North Randolph Street Arlington, VA 22203-2114 mailto:name@darpa.mil

PART II: FULL TEXT OF ANNOUNCEMENT

I. Funding Opportunity Description

The Defense Advanced Research Projects Agency (DARPA) often selects its research efforts through the Broad Agency Announcement (BAA) process. This BAA is being issued, and any resultant selection will be made, using the procedures under Federal Acquisition Regulation (FAR) 6.102(d)(2) and 35.016 and 2 C.F.R. § 200.203. Any negotiations and/or awards will use procedures under FAR 15.4, Contract Pricing. Proposals received as a result of this BAA shall be evaluated in accordance with evaluation criteria specified herein through a scientific review process.

DARPA BAAs are posted on the Federal Business Opportunities (FedBizOpps) website, http://www.fbo.gov/, and, as applicable, the Grants.gov website at http://www.grants.gov/. The following information is for those wishing to respond to the BAA.

The Microsystems Technology Office at DARPA seeks innovative proposals to develop integrated, ultra-broadband, mixed-mode electronics with embedded advanced digital CMOS (Complementary Metal-Oxide-Semiconductor) electronics in a U.S. domestic foundry fabrication platform. This advanced analog radio frequency (RF) mixed-mode electronics platform would provide ultra-wide instantaneous bandwidth, higher spur-free dynamic range (SFDR), and finer data converter resolution with more effective number of bits (ENOB) than the current state of the art. The incorporation of embedded digital CMOS electronics, with an end goal of an advanced 22 nm or smaller processes, will result in highly integrated digital processing and intelligence on one chip to provide differentiating capabilities for DoD systems. T-MUSIC will provide the foundation for enduring U.S. leadership in mixed-mode electronics technology by further developing next-generation THz (terahertz) mixed-mode devices designed for integration with an advanced CMOS fabrication platform. This is expected to greatly enhance Department of Defense (DoD) capabilities in advanced RF sensors and high capacity communications.

A. Background

RF mixed-mode electronics form the critical frontend interface used to convert analog wireless signals to a digital representation and vice versa. Frontend performance directly impacts overall system capabilities such as the detection sensitivity, range, signal discrimination, and operating frequency coverage. These system parameters impact virtually all DoD electronic systems including communications, radar, signals intelligence (SIGINT), and electronic warfare (EW).

Current commercial RF mixed-mode systems on a chip (SoCs) are implemented on a digital CMOS platform for wireless applications, which operate at low microwave bands. The capability to operate at higher frequency with larger signal bandwidth and higher resolution is currently constrained by the performance of the existing CMOS technology platforms.

Following the trend of Moore’s Law over the past five decades, digital CMOS scaling has focused on increasing integration density to process high computing workloads in a single chip. This successful scaling has been achieved by reducing the size and power consumption of the underlying transistors. However, scaled digital CMOS transistors can no longer support the high switching speed and voltage required to convert fast analog signals in fine resolution over a large http://www.fbo.gov/ http://www.grants.gov/ dynamic range and wide operating frequency. The resulting technology bottlenecks restrict many DoD applications in operating frequencies, signaling bandwidth, fidelity, detection sensitivity, and energy efficiency. To fully advance the RF mixed-mode interface, new innovations in integrated microelectronics are needed to move beyond the traditional progression of Moore’s Law scaling in digital CMOS technologies.

B. Program Description

The objective of T-MUSIC is to enable disruptive RF mixed-mode technologies by developing high performance RF analog electronics integrated with advanced digital CMOS electronics on the same wafer. This will enable next generation RF mixed-mode interfaces with an unprecedented combination of wide spectral coverage, high resolution, large dynamic range, and high information processing bandwidth.

Through the T-MUSIC program, DARPA seeks to: 1) advance RF and mixed-mode devices to support ultra wide RF frontends from HF to 100 GHz; 2) integrate those devices with high density digital CMOS electronics at the wafer scale to enable embedded digital intelligence; 3) develop and explore ultra-high resolution broadband mixed-mode circuit building blocks for DoD-relevant applications; 4) explore innovative device topologies and materials to implement THz devices in an advanced digital CMOS fabrication platform; and 5) establish a domestic ecosystem that facilitates enduring DoD access to differentiated capabilities for high performance RF mixed-mode SoCs.

Improvements in key transistor performance parameters such as current-gain and maximum power-gain cutoff frequencies (fT and fmax) as well as intrinsic noise produce measurable performance enhancement at the SoC and system level. T-MUSIC seeks proposals to integrate high frequency, low noise electronics, such as heterojunction bipolar transistors (HBTs), with high density CMOS onto a wafer. Such an effort would leverage prior investments in digital CMOS processes and tool sets in U.S. onshore foundries. For example, by aggressively scaling in the lateral and vertical dimensions in SiGe HBTs, speed can be increased to over 500 GHz of fT.1 Furthermore, the speed and RF performance of co-integrated digital CMOS could be concurrently enhanced using silicon-on-insulator (SOI) structures to reduce interconnect parasitics and RF leakage.

T-MUSIC foundry performers will provide multiple project wafers (MPWs) with engineering process design kits (PDKs) to circuit design partners to identify optimal device topologies for critical RF mixed-mode circuit functions for future DoD applications. Once selected for T- MUSIC, the foundry (TA-1A) and design (TA-1B) performers will establish collaboration under an Associate Contractor Agreement (ACA) (See Section III.D. “Associate Contractor Agreement Clause”) prior to contract award. To facilitate the exchange of information for the technology development and coordination, each TA-1B team will establish collaboration under an ACA with the other TA-1B teams prior to contract award. In addition, the TA-1A and TA-1B performers will establish all appropriate industrial agreements regarding restrictions on the usage of IP (intellectual property) blocks in the design activities. Targeted performance metrics of selected critical mixed-

1 B. Heinemann et al., "SiGe HBT with fT/fmax of 505 GHz/720 GHz," 2016 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, 2016, pp. 3.1.1-3.1.4. doi: 10.1109/IEDM.2016.7838335 mode building blocks, such as phase-locked loops (PLLs), analog-to-digital converters (ADCs) and ultrafast frequency dividers are established to guide the T-MUSIC technology developments.

It is intended that the resulting IP and associated design documents will become part of a shared DoD design repository. This close partnership between the DoD community and U.S.-based RF mixed-mode foundries will provide a discriminating mixed-mode capability, leveraging previous U.S. government investments across the past decade.

Through TA-2, T-MUSIC also seeks foundational breakthrough research in ultra-broadband transistors well beyond the near-term advances in foundry technologies. The program will demonstrate THz transistors with novel device topologies and materials by exploiting advanced nano-scale digital CMOS processing platforms. Simulations of these highly scaled devices indicate THz transistor speed can be attained using processes in an advanced silicon CMOS platform. The scalability in integration density and circuit performance of the THz devices shall be demonstrated in high speed digital divider circuits at input frequency up to 400 GHz by the end of the program.

TA-2 teams will perform independent research and development and, as such, ACAs with other T-MUSIC teams will not be required.

C. Program Structure

The T-MUSIC program is a four-year effort beginning in FY19 and ending in FY23. It will have an 18-month Phase 1, 18-month Phase 2, and 12-month Phase 3. The program will have three technical areas (TA-1A, TA-1B and TA-2) that will run concurrently. The program seeks to develop wafer-scale technology on a silicon CMOS-based foundry platform. Proposals for heterogeneous integration techniques with separately-fabricated compound semiconductor transistors such as III-V, II-VI, GaAs, InP or GaN are not appropriate for the T-MUSIC program and will not be considered responsive to this BAA.

TA-1A: Ultra-broadband Mixed-Mode Foundry Technology The TA-1A technical area will develop advanced mixed-mode technologies with high speed low noise RF analog transistors co-integrated at wafer scale with embedded advanced digital CMOS electronics (≤ 22 nm) on the same wafer in a U.S. onshore foundry.

TA-1B: Ultra-broadband Mixed-Mode Building Blocks TA-1B is a design-focused technical area that is tightly coupled with TA-1A. TA-1B will implement advanced broadband RF mixed-mode building blocks while assisting with the co-development of the TA-1A foundry technologies through iterative engineering multi-project wafer (MPW) runs provided by the TA-1A team(s). The goal of this partnership is to align the TA-1A process technology with emerging and best-practice design techniques to provide superior performance of TA-1B mixed-mode building blocks for DoD-relevant applications. The advanced mixed-mode IP designs will establish the foundation of a mixed-mode IP library repository for the DoD user community2.

TA-1A awards are anticipated to be funded with 6.3 (Advanced Technology Development) funding, the research being carried out by all team members (prime and subcontractors/for-profit, non-profit and universities) will be considered restricted research. See Part II(II)(B), “Fundamental

2 The IP library repository itself is not a topic of the T-MUSIC BAA.

Research,” below. TA-1B awards are anticipated to be funded with 6.2 (Applied Research) funding, the research being carried out by non-profit and university performers (prime and subcontractors) will be considered fundamental research.

TA-2: Advanced THz Mixed-Mode Devices TA-2 has a more fundamental focus in which new types of RF mixed-mode transistors will be explored to demonstrate transistor fT up to 1 THz in a scalable CMOS platform.

Given TA-2 is anticipated to be funded with 6.2 (Applied Research) funding, the research being carried out by non-profit and university performers (prime and subcontractors) will be considered fundamental research. See Part II(II)(B), “Fundamental Research,” below.

D. Technical Areas

1. Technical Area 1 (TA-1): Ultra-broadband Mixed-Mode Foundry Technology

The goal of Technical Area 1 (TA-1) is to develop a US-based foundry technology platform with >600 GHz transistors and dense (≤ 22 nm) digital CMOS on the same wafer to enable high performance, low noise mixed-mode circuit performance with 50 GHz of instantaneous bandwidth and 8 ENOB by the end of the program. TA-1 is further broken down into two sub-areas, TA-1A and TA-1B.

The detailed metrics for TA-1 are shown in the Table 1 below:

Table 1. T-MUSIC TA-1 Metrics

(a) Proposal must define the test structure for extrinsic fT and fmax to include practical parasitics of the gate and interconnect.

fT and fmax will be extracted from measurements at >20 GHz

(b) The advanced CMOS node requirement for embedded digital circuits

(c) PCM: foundry-defined Process-Control Monitor (i.e. testers, transistors, 59-stage ring-oscillators)

(d) PLL: Phase-Locked Loop; ENOB: Effective Number of bits; IBW: Instantaneous Bandwidth; ADC: Analog-to-Digital

Converter; THA: Track-and-Hold Amplifier

(e) Within-wafer yield with more than 10 demo circuits per wafer

TA-1A proposals should provide in-depth discussions on the technical approaches and rationales to address: device structure, modeled and simulated performance, critical process development, integration of embedded digital CMOS, process control monitors (PCMs), PDKs, and risk mitigation paths to attain the performance metrics for each phase. Factors impacting the RF mixed-mode transistor performance, such as fT, fmax, broadband minimum noise figure (NFmin), and1/f noise corner frequency (fc), should be addressed with modeling and simulations. Tabulated performance goals along with the program metrics should be provided over three phases. The models and documentation of device, PDKs, and IP cells developed under T-MUSIC will be contributed to a DoD design repository available for DoD design community.

TA-1A foundry performers are required to demonstrate high speed transistors and the success of the wafer-scale co-integration of embedded dense digital CMOS electronics. In addition, by working closely with the TA-1B design teams, simple demonstration circuits will be designed into the PCM cells to be fabricated, tested, and reported to TA-1B performers throughout each program phase. The device performance and fabrication yield of PCMs (i.e. test elements, transistors and 59-stage ring oscillators) should be demonstrated to meet the performance goal in each phase.

TA-1B performers are required to propose and implement at least all three TA-1B Demo Circuits as shown in Table 1 with associated circuit architecture, design, and analysis to show the path to meet (or exceed) the program goals. The proposed effort should provide in-depth discussion on the technical approaches and rationales to address proposed circuit topologies, critical function blocks and operations, impacts of transistor speed and noises, energy consumption, and robustness of the building blocks. Critical factors impacting the performance of three benchmarking circuit building blocks, such as close-in phase noises, broadband noises, timing jitter, instantaneous bandwidth, input bandwidth, linearity and mismatches, should be discussed with supporting models and simulation. Simulation should also demonstrate the impact of TA-1A on performance and power consumption for the innovative circuit architectures proposed in TA-1B. The proposal should clearly state the key differentiating elements of the approach over state of the art and how T-MUSIC enables the performance. The estimated performance of these building blocks should be tabulated along with the program metrics over the three phases. The metrics called out in the TA-1 timeline for each phase should be used to determine the performance goals of the building blocks and the associated yield numbers for each MPW run.

TA-1B performers are also expected to provide technical guidance and support to the critical elements in the TA-1A PCM development and periodically exchange the test results with the TA-1A performer(s) as the feedback to guide the foundry technology development.

Proposing additional circuit building blocks, especially for DoD applications, is encouraged.

However, these should be priced as separate options, and due to the limit of the available reticle space of an MPW run, the additional circuit building blocks may or may not be fabricated depending on the decision of the T-MUSIC Program Manager.

In addition to Classified Information (please see “Security Information” section), T-MUSIC performers should also comply with the controlled technical information regulation (please see

“Disclosure of Information and Compliance with Safeguarding Covered Defense Information Controls” section).

Coordination between TA-1A and TA-1B:

It is expected that the TA-1A and TA-1B performers will establish Associate Contractor Agreements (ACAs) and, if necessary, other mutual non-disclosure agreements (NDAs) and/or Design Kit License Agreements (DKLAs) at the inception of the program to share the PDK and IP library. Each TA-1A foundry team will be required to provide a PDK at the beginning of each phase to the TA-1B design teams to design benchmarking circuitry and/or critical PCM test cells.3 In addition, it is expected that each TA-1B performer will establish an ACA with each of the other TA-1B performers. As previously noted, each performer’s required ACAs must be in place prior to contract award.

TA-1A proposers should provide the required information (e.g. reticle size or the available die area) and organize and aggregate the proposed MPW runs for TA-1B design partners. The expected schedule and milestones are outlined in Section E.

Proposers must submit to TA-1A and/or TA-1B independently. A single proposal addressing more than one Technical Area will be deemed non-compliant and, as such, will NOT be reviewed or considered for selection. Besides the proposed technical approaches, it is expected that the coordination plan of TA-1A (with regards to MPW/PDK development and fabrication runs) and TA-1B (with regards to pivotal PCM elements and expected feedback means to foundry technology development) should be clearly outlined in the respective proposals.

2. Technical Area 2 (TA-2): Advanced THz Mixed-Mode Devices

The goal of Technical Area 2 (TA-2) is to develop revolutionary THz devices to advance progress in semiconductor devices beyond the TA-1 foundry technology. Similar to TA-1, there are three phases for TA-2: Phase 1 (18 months), Phase 2 (18 months) and Phase 3 (12 months). TA-2 has a more fundamental focus in which new types of RF mixed-mode transistors will be explored to attain high transistor cut-off frequencies to THz. It is expected that these transistors will exploit the advanced materials, device structures, and integration processes in an advanced digital CMOS fabrication platform.

TA-2 is independent of TA-1, and proposals submitted to TA-2 must be separate and standalone from any submission to TA-1. A single proposal addressing more than one Technical Area will be deemed non-compliant and, as such, will NOT be reviewed or

3 As discussed in Section III.D. below, ACAs are agreements between performers (prime contractors) specifically for the purpose of ensuring the necessary exchange of information takes place so that the each party can successfully carry out the tasks delineated in their respective Statements of Work (SOW). Mutual non-disclosure agreements (NDAs) and/or Design Kit License Agreements (DKLAs) are agreements between TA-1A and TA-1B performers (designers and foundries) specifically for purposes of establishing the control (handling/disclosure restrictions, marking requirements, etc.) of information – for example, PDKs being provided by foundries to designers. In all cases, the Government is not a party to such agreements (although copies of ACAs must be provided to the Contracting Officer prior to contract award).

considered for selection. Submitting to TA-1 does not require a submission to TA-2 and vice versa.

The metrics for TA-2 are shown below:

Table 2. T-MUSIC TA-2 Metrics

(a) Proposal must define the test structure for extrinsic fT and fmax to include practical parasitics of the transistor and interconnect. fT and fmax will be extracted from >20 GHz measurement

Today’s advanced CMOS devices, such as 10 nm or 7 nm FinFET technology, cannot provide as good RF or analog performance as the legacy vertical SiGe heterostructure bipolar transistors and it is challenging to co-integrate them for better performance beyond what TA- 1 plans to develop. TA-2 will explore innovative lateral device concepts by leveraging the advanced process techniques of advanced CMOS platforms. The goal is to demonstrate a THz transistor that is fabrication-process-compatible with advanced FinFET CMOS platforms. The success of TA-2 will be evaluated by the transistor cut-off speeds and the demonstration of a small, but high-speed prescaler circuit.

TA-2 proposals should provide in-depth discussions on the technical approaches and rationales to attain THz transistors by addressing: novel device structure, model and simulated performance, critical process development using advanced CMOS fabrication platform, and risk mitigation paths to attain the performance metrics for each phase. Factors impacting the THz performance, such as fT, fmax, device structures, parasitic elements, critical dimensions, fabrication processes, broadband minimum noise figure (NFmin), and1/f noise corner frequency (fc), should be addressed with estimated performance supported by modeling and simulations.

The expected performance goals and associated critical device and process parameters should be tabulated along with the program metrics over three phases.

E. Schedule/Milestones/Deliverables

TA-1: A high-level timeline of the expected TA-1 development is detailed with expected schedule and milestones in Tables 3 and 4.

TA-1A: A multi-project wafer (MPW) run will occur at month 9 of each phase to validate the PDK, device models, and building block designs. The TA-1A proposers should include the MPW runs as a part of the proposed T-MUSIC TA-1A development tasks and provide the proposed MPW service to TA-1B teams and/or additional government design teams at no additional cost4. It is expected that TA-1A and TA-1B partners will hold frequent critical

4 Effectively, this means the MPW runs will be procured (provided for) under the TA-1A contract(s) and then provided to the TA-1B performers as Government Furnished Property (Services).

design reviews and test reviews to facilitate the coordination and cooperation necessary to advance the T-MUSIC technologies.

The TA-1B building block designs will be sent to TA-1A foundry team at the 7th month of each phase to begin the fabrication of MPWs at the 9th month of Phases 1 and 2. In each phase, the fabrication of MPWs will be completed within six months of TA-1A foundry teams receiving design tape-in. The MPW design and fabrication cycle in Phase 3 is reduced as seen in Table 4. The resulting designs will then be tested and validated by the TA-1B design teams and by a government test team to be completed and reported a month before the end of each phase.

Throughout each phase, a new PDK development will be carried out simultaneously and verified along with the new device technologies such that the delivery of the updated PDK at the end of each phase will support the circuit design in the next phase. Thus, the “PDR/CDR” elements for the PDK are intended to close the loop between the Foundry team and Design team. At the end of Phases 2 and 3, the PDK should be developed sufficiently for commercial and Government design teams to be able to perform designs using the foundry technology.

This process will allow commercial and Government transition partners to fully utilize the technology developed under T-MUSIC.

TA-1B: Preliminary and critical design reviews of the demonstration circuits should indicate how fabricated circuits will attain their target metrics in each phase. Delivery of prototype devices (hardware) to the Government in month 16 of each phase (month 10 in Phase 3) will allow the Government to independently verify performance of the demonstration circuits to provide the feedback to TA1-A foundry team.

TA-2: TA-2 is intended to create a spiral of device simulation and design required to develop a new high speed RF mixed-mode device and then scale that device in a manner that can be tightly integrated with high density CMOS logic on the same wafer. As such, specific schedules for multiple short fabrication loops in each phase are left up to the proposer to specify. It is suggested that these short loop runs in some way coordinate with quarterly program reviews, teleconferences, and twice annual in-person program meetings. End of phase milestones are required deadlines.

The notional schedule, milestones, and deliverables of Phase 1 and 2 are shown in Table 3 and those for Phase 3 are shown in Table 4. It is critical that the timelines of multiple partners are aligned to facilitate coordination of MPW runs. Therefore, if a deviation from Tables 3 or 4 is proposed, proposals must justify the reasons.

Table 3. Schedule, milestones and deliverables for Phase 1 and 2

PDK: Process Design Kit; SL: Short Fabrication Loop; PDR: Preliminary Design Review;

CDR: Critical Design Review; NDA: Non-Disclosure Agreement; PCM: Process Control Monitor.

Table 4. Schedule, milestones and deliverables for Phase 3

PDK: Process Design Kit; SL: Short Loop; PDR: Preliminary Design Review; CDR: Critical Design Review; NDA: Non-Disclosure Agreement; PCM: Process Control Monitor.

F. Additional Deliverables

The T-MUSIC program requires further deliverables in addition to those listed in the previous section:

1. Technical Reports Technical reports shall be submitted on a monthly basis beginning within two weeks after the kick-off meeting and two working days prior to each subsequently scheduled program event, such as technical review meetings.

2. Monthly Financial Reports The financial report shall describe resources expended, resources available, any deviation from planned expenditures, and any potential issues requiring the attention of the Government team. This report shall be provided within 10 days from the end of each month.

3. Technical Review Meetings/Program Review Meetings Technical review meetings will be held quarterly with the T-MUSIC Program Manager, usually as a teleconference. Program reviews with all performers will be held semi-annually and will replace the technical review meeting. Technical reports corresponding to these program events can be submitted as annotated slide presentations. Technical reports for the months without specific program events shall be submitted as text documents. All reports shall include a technical and management work plan that documents the project schedule including milestones and is updated as required.

4. Final Report After the end of each phase, the report shall summarize the effort in a comprehensive text document.

G. Government Furnished Equipment/Property/Information

TA-1A: None.

TA-1B: As previously discussed, TA-1A MPW runs to TA-1B performers (as coordinated via the TA-1A/TA-1B ACAs).

TA-2: None.

H. Intellectual Property

It is expected that the data/software developed under T-MUSIC will have the following minimum data rights:

TA-1A: Government shall have no less than Limited/Restricted Rights (or similar if an Other Transaction).

TA-1B: Government shall have no less than Government Purpose Rights (or similar if an Other Transaction).

TA-2: Government shall have no less than Government Purpose Rights (or similar if an Other Transaction).

See also Section IV.B.3, “Other Transaction Request, if applicable” and Section IV.B.11, “Intellectual Property.”

II. Award Information

A. General Award Information

Multiple awards are anticipated. The amount of resources made available under this BAA will depend on the quality of the proposals received and the availability of funds.

The Government reserves the right to select for negotiation all, some, one, or none of the proposals received in response to this solicitation, and to make awards without discussions with proposers.

The Government also reserves the right to conduct discussions if it is later determined to be necessary. If warranted, portions of resulting awards may be segregated into pre-priced options.

Additionally, DARPA reserves the right to accept proposals in their entirety or to select only portions of proposals for award. In the event that DARPA desires to award only portions of a proposal, negotiations may be opened with that proposer. The Government reserves the right to fund proposals in phases with options for continued work at the end of one or more of the phases, as applicable.

Awards under this BAA will be made to proposers on the basis of the evaluation criteria listed below (see section labeled “Application Review Information,” Sec. V.), and program balance to provide overall value to the Government. The Government reserves the right to request any additional, necessary documentation once it makes the award instrument determination. Such additional information may include but is not limited to Representations and Certifications (see Section VI.B.4., “Representations and Certifications”). The Government reserves the right to remove proposers from award consideration should the parties fail to reach agreement on award terms, conditions and cost/price within a reasonable time or the proposer fails to timely provide requested additional information. Proposals identified for negotiation may result in a procurement contract, grant, cooperative agreement, or other transaction, depending upon the nature of the work proposed, the required degree of interaction between parties, whether or not the research is classified as Fundamental Research, and other factors.

Proposers looking for innovative, commercial-like contractual arrangements are encouraged to consider requesting Other Transactions. To understand the flexibility and options associated with Other Transactions, consult http://www.darpa.mil/work-with-us/contract-management#OtherTransactions.

In accordance with 10 U.S.C. § 2371b(f), the Government may award a follow-on production contract or Other Transaction (OT) for any OT awarded under this BAA if: (1) that participant in the OT, or a recognized successor in interest to the OT, successfully completed the entire prototype project provided for in the OT, as modified; and (2) the OT provides for the award of a follow-on production contract or OT to the participant, or a recognized successor in interest to the OT.

http://www.darpa.mil/work-with-us/contract-management#OtherTransactions

In all cases, the Government contracting officer shall have sole discretion to select award instrument type, regardless of instrument type proposed, and to negotiate all instrument terms and conditions with selectees. DARPA will apply publication or other restrictions, as necessary, if it determines that the research resulting from the proposed effort will present a high likelihood of disclosing performance characteristics of military systems or manufacturing technologies that are unique and critical to defense. Any award resulting from such a determination will include a requirement for DARPA permission before publishing any information or results on the program.

For more information on publication restrictions, see the section below on Fundamental Research.

B. Fundamental Research

It is DoD policy that the publication of products of fundamental research will remain unrestricted to the maximum extent possible. National Security Decision Directive (NSDD) 189 defines fundamental research as follows:

‘Fundamental research’ means basic and applied research in science and engineering, the results of which ordinarily are published and shared broadly within the scientific community, as distinguished from proprietary research and from industrial development, design, production, and product utilization, the results of which ordinarily are restricted for proprietary or national security reasons.

As of the date of publication of this BAA, the Government expects that program goals as described herein may be met by proposers intending to perform fundamental research and proposers not intending to perform fundamental research or the proposed research may present a high likelihood of disclosing performance characteristics of military systems or manufacturing technologies that are unique and critical to defense. Based on the nature of the performer and the nature of the work, the Government anticipates that some awards will include restrictions on the resultant research that will require the awardee to seek DARPA permission before publishing any information or results relative to the program.

Proposers should indicate in their proposal whether they believe the scope of the research included in their proposal is fundamental or not. While proposers should clearly explain the intended results of their research, the Government shall have sole discretion to select award instrument type and to negotiate all instrument terms and conditions with selectees. Appropriate clauses will be included in resultant awards for non-fundamental research to prescribe publication requirements and other restrictions, as appropriate. This clause can be found at http://www.darpa.mil/work-with-us/additional-baa.

For certain research projects, it may be possible that although the research being performed by the awardee is restricted research, a subawardee may be conducting fundamental research. In those cases, it is the awardee’s responsibility to explain in their proposal why its subawardee’s effort is fundamental research http://www.darpa.mil/work-with-us/additional-baa http://www.darpa.mil/work-with-us/additional-baa

III. Eligibility Information

A. Eligible Applicants

All responsible sources capable of satisfying the Government's needs may submit a proposal that shall be considered by DARPA.

1. Federally Funded Research and Development Centers (FFRDCs) and Government Entities

a) FFRDCs

FFRDCs are subject to applicable direct competition limitations and cannot propose to this BAA in any capacity unless they meet the following conditions: (1) FFRDCs must clearly demonstrate that the proposed work is not otherwise available from the private sector. (2) FFRDCs must provide a letter on official letterhead from their sponsoring organization citing the specific authority establishing their eligibility to propose to Government solicitations and compete with industry, and their compliance with the associated FFRDC sponsor agreement’s terms and conditions. This information is required for FFRDCs proposing to be awardees or subawardees.

b) Government Entities

Government Entities (e.g., Government/National laboratories, military educational institutions, etc.) are subject to applicable direct competition limitations. Government entities must clearly demonstrate that the work is not otherwise available from the private sector and provide written documentation citing the specific statutory authority and contractual authority, if relevant, establishing their ability to propose to Government solicitations.

c) Authority and Eligibility

At the present time, DARPA does not consider 15 U.S.C. § 3710a to be sufficient legal authority to show eligibility. While 10 U.S.C.§ 2539b may be the appropriate statutory starting point for some entities, specific supporting regulatory guidance, together with evidence of agency approval, will still be required to fully establish eligibility. DARPA will consider FFRDC and Government entity eligibility submissions on a case-by-case basis; however, the burden to prove eligibility for all team members rests solely with the proposer.

(1) Non-U.S. organizations and/or individuals may participate to the extent that such participants comply with any necessary nondisclosure agreements, security regulations, export control laws, and other governing statutes applicable under the circumstances.

(2) For classified proposals, applicants will ensure all industrial, personnel, and information systems processing security requirements are in place and at the appropriate level (e.g., Facility Clearance Level (FCL), Automated Information Security

(AIS), Certification and Accreditation (C&A), and any Foreign Ownership Control and Influence (FOCI) issues are mitigated prior to submission. Additional information on these subjects can be found at http://www.dss.mil.

B. Organizational Conflicts of Interest

FAR 9.5 Requirements In accordance with FAR 9.5, proposers are required to identify and disclose all facts relevant to potential OCIs involving the proposer’s organization and any proposed team member (subawardee, consultant). Under this Section, the proposer is responsible for providing this disclosure with each proposal submitted to the BAA. The disclosure must include the proposer’s, and as applicable, proposed team member’s OCI mitigation plan. The OCI mitigation plan must include a description of the actions the proposer has taken, or intends to take, to prevent the existence of conflicting roles that might bias the proposer’s judgment and to prevent the proposer from having unfair competitive advantage. The OCI mitigation plan will specifically discuss the disclosed OCI in the context of each of the OCI limitations outlined in FAR 9.505-1 through FAR 9.505-4.

Agency Supplemental OCI Policy In addition, DARPA has a supplemental OCI policy that prohibits contractors/performers from concurrently providing Scientific Engineering Technical Assistance (SETA), Advisory and Assistance Services (A&AS) or similar support services and being a technical performer.

Therefore, as part of the FAR 9.5 disclosure requirement above, a proposer must affirm whether the proposer or any proposed team member (subawardee, consultant) is providing SETA, A&AS, or similar support to any DARPA office(s) under: (a) a current award or subaward; or (b) a past award or subaward that ended within one calendar year prior to the proposal’s submission date.

If SETA, A&AS, or similar support is being or was provided to any DARPA office(s), the proposal must include:

The name of the DARPA office receiving the support;

The prime contract number;

Identification of proposed team member (subawardee, consultant) providing the support; and An OCI mitigation plan in accordance with FAR 9.5.

Government Procedures In accordance with FAR 9.503, 9.504 and 9.506, the Government will evaluate OCI mitigation plans to avoid, neutralize or mitigate potential OCI issues before award and to determine whether it is in the Government’s interest to grant a waiver. The Government will only evaluate OCI mitigation plans for proposals that are determined selectable under the BAA evaluation criteria and funding availability.

The Government may require proposers to provide additional information to assist the Government in evaluating the proposer’s OCI mitigation plan.

If the Government determines that a proposer failed to fully disclose an OCI; or failed to provide the affirmation of DARPA support as described above; or failed to reasonably provide additional http://www.dss.mil/ information requested by the Government to assist in evaluating the proposer’s OCI mitigation plan, the Government may reject the proposal and withdraw it from consideration for award.

C. Cost Sharing/Matching

Cost sharing is not specifically a requirement of this BAA; however, it is strongly encouraged for TA-1A proposals, where there is a reasonable probability of a potential commercial application related to the proposed research and development effort.

For more information on potential cost sharing requirements associated with the use of Other Transaction (OT) authorities, see http://www.darpa.mil/work-with-us/contract-management#OtherTransactions.

D. Associate Contractor Agreement Clause

This same or similar clause will be included in all TA-1A and TA-1B awards against

HR001119S0016:

(a) It is recognized that success of the T-MUSIC research effort depends in part upon the open exchange of information between the various Associate Contractors involved in the effort. This clause is intended to ensure that there will be appropriate coordination and integration of work by the Associate Contractors to achieve complete compatibility and to prevent unnecessary duplication of effort. By executing this contract, the Contractor assumes the responsibilities of an Associate Contractor. For the purpose of this clause, the term Contractor includes subsidiaries, affiliates, and organizations under the control of the contractor (e.g. subcontractors).

(b) Work under this contract may involve access to proprietary or confidential data from an Associate Contractor. To the extent that such data is received by the Contractor from any Associate Contractor for the performance of this contract, the Contractor hereby agrees that any proprietary information received shall remain the property of the Associate Contractor and shall be used solely for the purpose of the T-MUSIC research effort. Only that information which is received from another contractor in writing and which is clearly identified as proprietary or confidential shall be protected in accordance with this provision.