HR001117S0024.pdf

Microsystems Technology Office Broad Agency Announcement

Dynamic Range-enhanced Electronics and Materials (DREaM)

HR001117S0024

March 28, 2017

Table of Contents

PART I: OVERVIEW INFORMATION

PART II: FULL TEXT OF ANNOUNCEMENT

I. Funding Opportunity Description A. Background B. Program Description C. Program Structure D. Technical Areas

1. Technical Area 1 (TA1): High Power

2. Technical Area 2 (TA2): High Linearity

E. Test Methodology F. Schedule/Milestones G. Deliverables

1. Technical Reports

2. Monthly Financial Reports

3. Prototype Devices

4. Final Report

H. Government Furnished Equipment/Property/Information II. Award Information

A. General Award Information B. Fundamental Research

III. Eligibility Information A. Eligible Applicants

1. Federally Funded Research and Development Centers (FFRDCs) and Government Entities

2. Non-U.S. Organizations and/or Individuals B. Organizational Conflicts of Interest C. Cost Sharing/Matching

IV. Application and Submission Information A. Address to Request Application Package B. Content and Form of Application Submission

1. Full Proposal Format

2. Proprietary Information

3. Security Information

a. Unclassified Submissions

b. Classified Submissions

4. Disclosure of Information and Compliance with Safeguarding Covered Defense

Information Controls

5. Human Research Subjects/Animal Use

6. Approved Cost Accounting System Documentation

7. Section 508 of the Rehabilitation Act (29 U.S.C. § 749d)/FAR 39.2

8. Grant Abstract

9. Small Business Subcontracting Plan

10. Intellectual Property

a. For Procurement Contracts

b. For All Non-Procurement Contracts

11. Patents

12. System for Award Management (SAM) and Universal Identifier Requirements

13. Funding Restrictions

C. Submission Information

1. Submission Dates and Times

a. Frequently Asked Questions (FAQ)

2. Proposal Submission Information

a. For Proposers Requesting Grants or Cooperative Agreements:

b. For Proposers Requesting Contracts or Other Transaction Agreements

c. Classified Submission Information

3. Other Submission Requirements

V. Application Review Information A. Evaluation Criteria

1. Overall Scientific and Technical Merit

2. Potential Contribution and Relevance to the DARPA Mission

3. Cost and Schedule Realism

4. Proposer’s Capabilities and/or Related Experience

5. Plans and Capability to Accomplish Technology Transition

B. Review and Selection Process

1. Review Process

2. Handling of Source Selection Information

3. Federal Awardee Performance and Integrity Information (FAPIIS)

VI. Award Administration Information A. Selection Notices

1. Proposals B. Administrative and National Policy Requirements

1. Meeting and Travel Requirements

2. FAR and DFARS Clauses

3. Controlled Unclassified Information (CUI) on Non-DoD Information Systems

4. Representations and Certifications

5. Terms and Conditions

C. Reporting D. Electronic Systems

1. Wide Area Work Flow (WAWF)

2. i-Edison

VII. Agency Contacts VIII. Other Information

A. Proposers Day B. Protesting

ATTACHMENT 1: Cost Volume Proposer Checklist ATTACHMENT 2: Proposal Summary Slide Template

PART I: OVERVIEW INFORMATION

Federal Agency Name – Defense Advanced Research Projects Agency (DARPA), Microsystems Technology Office (MTO)

Funding Opportunity Title – Dynamic Range-enhanced Electronics and Materials (DREaM)

Announcement Type – Initial Announcement Funding Opportunity Number – HR001117S0024 Catalog of Federal Domestic Assistance Numbers (CFDA) – 12.910 Research and

Technology Development Dates (All times listed herein are Eastern Time) o Posting Date: March 28, 2017 o Proposers Day: March 29, 2017 o FAQ Submission Deadline: May 10, 2017 o Proposal Due Date: May 24, 2017 o Estimated period of performance start: September 29, 2017

Concise description of the funding opportunity: The Dynamic Range-enhanced Electronics and Materials (DREaM) program will exploit new materials and novel device structures to create radio frequency (RF) transistors that enable asymmetric operations in a complex electromagnetic spectrum.

Anticipated Funding Available for Award: DARPA anticipates a funding level of approximately $40M for the DREaM program.

Anticipated individual awards – Multiple awards in each technical area are anticipated.

Anticipated funding type – 6.2 Types of instruments that may be awarded – Procurement contract, grant, cooperative agreement or other transaction Agency contact o Dr. Daniel Green, Program Manager BAA Coordinator: HR001117S0024@darpa.mil

DARPA/MTO

ATTN: HR001117S0024

675 North Randolph Street Arlington, VA 22203-2114 mailto:name@darpa.mil

PART II: FULL TEXT OF ANNOUNCEMENT

I. Funding Opportunity Description

The Defense Advanced Research Projects Agency (DARPA) often selects its research efforts through the Broad Agency Announcement (BAA) process. This BAA is being issued, and any resultant selection will be made, using the procedures under Federal Acquisition Regulation (FAR) 6.102(d)(2) and 35.016 and 2 C.F.R. § 200.203. Any negotiations and/or awards will use procedures under FAR 15.4, Contract Pricing. Proposals received as a result of this BAA shall be evaluated in accordance with evaluation criteria specified herein through a scientific review process.

DARPA BAAs are posted on the Federal Business Opportunities (FedBizOpps) website, http://www.fbo.gov/, and, as applicable, the Grants.gov website at http://www.grants.gov/. The following information is for those wishing to respond to the BAA.

The Microsystems Technology Office at DARPA seeks innovative proposals aimed at creating the next generation of high frequency high dynamic range electronic devices. Specifically, DARPA is interested in material and transistor architectures to enable breakthrough dynamic range, radio frequency (RF) power density, efficiency, and linearity. Proposed research should investigate innovative approaches that enable revolutionary advances in science, devices, or systems. Specifically excluded is research that primarily results in evolutionary improvements to the existing state of practice.

A. Background

DARPA has long recognized the critical role transistors play in Department of Defense (DoD) systems – especially radio frequency (RF) systems ranging from radar and communications to signals intelligence and electronic warfare. In the 1990s, the DARPA MIMIC program advanced Gallium Arsenide (GaAs) transistor technology that enabled the radar and communication systems in use today. More recently, the development of Gallium Nitride (GaN) technology in the DARPA WBGS-RF, NEXT and MPC programs has advanced the ability to deliver high power RF signals at higher frequencies, bandwidths and efficiencies than earlier Silicon and GaAs technologies. However, while GaN transistors are now being adopted for many platforms, the use of the electromagnetic spectrum is evolving in new directions that motivate new directions in transistor technology.

The large number of commercial and military RF signals in use today has led to a complex and crowded electromagnetic environment. The demand for even more RF signals is growing and driving both an increase in the density of signals within frequency bands, as well as pushing the utilization of higher operating frequencies particularly into millimeter wave frequencies (i.e.

frequencies above 30 GHz). As a result, it becomes extremely important to expand dynamic range in RF systems due to in-band interfering signals, which require the capture of small signals in the presence of large interfering signals. The problem of realizing high dynamic range RF systems is that for operation in a complex spectrum with large signal-to-noise ratios, the intrinsic linearity and power density of the transistor technology fundamentally limits the ability of http://www.fbo.gov/ http://www.grants.gov/ transceivers to process RF signals efficiently with large bandwidth and high fidelity.

Unfortunately, while GaAs, and more recently, GaN technology has advanced the ability to reach higher power densities, it has not fundamentally changed the power requirements for the linearity performance in part because the transistor design leveraged canonical structures that have evolved slowly since the initial conception of the transistor. In order to address to core capabilities of transistor technology, a new approach to the materials and device structure will be required.

The fundamental capabilities of any transistor technology can be measured through several figures of merit. For linearity, the output third order intercept point (OIP3) is the common metric which captures the theoretical output power point where output parasitic harmonics are generated at an equal power level to the output fundamental signal. Transistors today typically obtain high OIP3 at the expense of direct current power (PDC). The metric of OIP3/PDC assesses the linearity of a transistor technology and has produced a 10 dB rule of thumb that seems to be semiconductor material independent (Fig 1). At low frequencies, circuit techniques can be used to increase the linearity of transmitters or receivers, but the circuit techniques become difficult to implement or are no longer feasible in the millimeter wave regime1,2,3. DARPA is looking to create a new class of transistor technology that can surpass the 10 dB rule by 100X.

Figure 1 - Linearity gap at mm wave frequencies

1 Z. Griffith, M. Urteaga, R. Pierson, P. Rowell, M. Rodwell and B. Brar, "A 3-stage shunt-feedback op-amp having

19.2 dB Gain, 54.1 dBm OIP3 (2GHz), and 252 OIP3/Pdc ratio," 2011 IEEE MTT-S International Microwave Symposium, Baltimore, MD, 2011, pp. 1-1.

2 I. Ishida et al., "Low current wideband amplifier using 0.2 µm gate MODFET fabricated by using phase-shift lithography," GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium. 18th Annual Technical Digest 1996, Orlando, FL, USA, 1996, pp. 249-252.

3 K. W. Kobayashi, "High linearity-wideband PHEMT Darlington amplifier with +40 dBm IP3," 2006 Asia-Pacific Microwave Conference, Yokohama, 2006, pp. 1035-1038.

In addition to the demand for higher linearity transmitters, there is also a competing demand on transmitter size, weight and power (SWaP) that prevents simply scaling up existing technologies to meet total output power requirement. Thus, a transistor technology that has increased power density must be developed to meet this need. Increasing power density in the millimeter wave region is even more challenging because power density decreases as frequency is increased.

DARPA is looking to elevate the performance of transistor technology by increasing the power density at millimeter wave to 20 W/mm.

The DREaM program aims to overcome the above stated challenges and realize high dynamic range RF transistors for a diverse set of amplifier applications by developing non-traditional materials, integrating new device structures, and innovating transistor layout. To realize higher dynamic range than what is achievable today, the output power density and the intrinsic device linearity must be significantly improved. It is anticipated that new concepts will need to be combined in order to achieve the program objectives.

Several experimental research results encourage the potential for radical innovation. For example, a GaN high electron mobility transistor (HEMT) with nanowire channel has shown flat transconductance,4 which implies the possibility to improve the transistor linearity by engineering the channel geometry. In contrast to the wideband gap GaN, a small bandgap carbon-nanotube field effect transistor (FET) has also demonstrated flat transconductance with a concurrent projected improvement in OIP3.5 In addition to these results, which suggest opportunities to engineer linearity, significant new materials options exist to raise power density.

A nitrogen-polar GaN FET recently achieved record 6.7 W/mm at 94 GHz,6 which demonstrates 3X higher output power density than Ga-face GaN by growing the crystal structure in a completely new manner. Furthermore, a two-dimensional electron gas density larger than ~2 x 1014 cm-2 was measured in a complex oxide system (a SmTiO3/SrTiO3 interface), which is about 10X higher than state-of-art GaN material system7. The examples highlighted here are intended to illustrate the range of emerging device possibilities to enable 4X higher output power density and 100X better amplifier linearity compared to the state of the art are projected but, importantly, are not intended to limit or recommend any specific solution.

Because these new materials and device concepts are dramatically different from those concepts currently employed in the industry, it presents an extremely challenging and risky development.

The DREaM program will develop new materials and integrate them into devices to make the next leap in RF transistor performance for future high-dynamic-range RF systems.

4 D. S. Lee et al., "Nanowire Channel InAlN/GaN HEMTs With High Linearity of gm and fT," in IEEE Electron Device Letters, vol. 34, no. 8, pp. 969-971, Aug. 2013.

5 M. Schroter, M. Claus, P. Sakalas, M. Haferlach and D. Wang, "Carbon Nanotube FET Technology for Radio- Frequency Electronics: State-of-the-Art Overview," in IEEE Journal of the Electron Devices Society, vol. 1, no. 1,

pp. 9-20, Jan. 2013.

6 S. Wienecke et al., "N-polar GaN Cap MISHEMT with record 6.7 W/mm at 94 GHz," 2016 74th Annual Device Research Conference (DRC), Newark, DE, 2016, pp. 1-2.

7 S. Raghavan, J. Y. Zhang, and S. Stemmer, Appl. Phys. Lett. 106, 132104 (2015).

B. Program Description

The DREaM program will develop new materials and novel device structures to create RF/millimeter wave transistors that enable high dynamic range RF systems. Such RF systems fundamentally require either high transmitting power to increase the signal strength or high linearity signal reception to minimize the spurs or noise in the spectrum. The DREaM program will dramatically increase the output power density at the transistor level as compared to present GaN technology. In addition, DREaM devices with intrinsically higher linearity will enable circuit and system designs with superior reception at much lower power consumption penalties.

Thus, DREaM technology will enable RF transceiver systems to achieve the same or better RF specifications as today while consuming much lower DC power, which will benefit systems from large phased array applications to small apertures on power-constrained platforms. Overall, the DREaM technology is anticipated to be foundational and impact a broad array of RF and millimeter wave (MMW) applications.

The goal of the DREaM program is to develop new transistor technologies that can achieve 4X higher output power density ( ) and 100X better amplifier linearity for a given direct current (DC) power ( ) in the millimeter regime (30 GHz) than is available today.

DREaM program seeks enhancement to intrinsic transistor performance, and does not seek investment in any circuit design techniques.8 The DREaM program is open to all possible materials and device structure approaches beyond those described above as long as the proposed transistor technologies will meet the program metrics.

C. Program Structure

The DREaM program goal of establishing intrinsic high dynamic range transistors leads to a separation in technical issues when addressing high power and high linearity transistors. For this reason, DREaM will contain two technical areas (TAs) that target the development of high power density and high linearity transistors in parallel paths. Both technical areas consist of three development phases. At the end of each development phase, the performers’ measured data will be compared to the program metrics of that development phase as outlined in Table 1.

D. Technical Areas

The two DREaM technical areas are discussed in further detail in the sections below.

1. Technical Area 1 (TA1): High Power

For the TA1 high power thrust, performers will develop a transistor technology that is capable of producing high RF output power densities with high power added efficiencies (PAE) at an operating frequency of 30 GHz. The central technical challenge for TA1 is to produce a minimum output power density of 20 W/mm at 30 GHz while simultaneously achieving at least

8 Circuit design techniques that are explicitly linked to a specific new device technology may be relevant.

50 % PAE. Additionally, the new transistor technology must demonstrate a minimum amount of output power and linearity (measured by OIP3) outlined in Table 1.

Technical area 1 of the DREaM program seeks comprehensive proposals with well-defined transistor development strategies for achieving the program metrics in all phases. High power transistors meeting part of the required Phase I device metrics have been previously reported9,10.

While the DREaM program is encouraged by those results, DARPA is expecting to explore these and further innovations to systematically achieve Phase I, II, and III program goals.

Phase I: Material and Device proof of concept (Base – 24 months) The performer will develop a unit cell transistor technology that demonstrates at least 10 W/mm and 40 % PAE at an operating frequency of 30 GHz. Additionally, the unit cell must also demonstrate at least 1 W of RF output and 10 dB of OIP3/PDC.

Phase II: Transistor Scaling for Enhanced Dynamic Range I (Option – 18 months) The performer will improve the power density and PAE of the transistor unit cell and will demonstrate an output power density of at least 15 W/mm and 45 % PAE. Additionally, the transistor unit cell must also demonstrate at least 2 W of RF output power and 10 dB of

OIP3/PDC.

Phase III: Transistor Scaling for Enhanced Dynamic Range II (Option – 18 months) The performer will further improve the power density and PAE of the transistor unit cell and will demonstrate an output power density of at least 20 W/mm and 50% PAE. Additionally, the transistor unit cell must also demonstrate at least 4 W of RF output power and 10 dB of

OIP3/PDC.

The increased output power density of DREaM devices may lead to thermal challenges.

Therefore, continuous wave (CW) power measurements are required for Phase I. Although CW power measurement is preferred, depending on proposed transistor approach it is possible that the junction temperature of the transistor might be too high without integrated advanced thermal management or cooling approaches at the device level in subsequent phases. To maintain focus on transistor development and to alleviate part of the potential thermal challenges in TA1, pulsed power measurements will be permitted for Phase II and Phase III. For consistency, the government will assess with a pulsed measurement with a duty cycle of 30 %, pulse width of 15 ms, and CW RF power applied while the device is in the on state.

2. Technical Area 2 (TA2): High Linearity

For the TA2 high linearity thrust, performers will develop transistors that enable high linearity amplification at a reduced cost of PDC from the transistor. The cost of PDC for transistor linearity will be measured through the OIP3 to PDC ratio. The central technical challenge for TA2 is the ability to produce a transistor technology with an OIP3/PDC of at least 1000 at an operating

9 J. S. Moon et al., "55% PAE and High Power Ka-Band GaN HEMTs With Linearized Transconductance via n+ GaN Source Contact Ledge," in IEEE Electron Device Letters, vol. 29, no. 8, pp. 834-837, Aug. 2008.

10 T. Palacios et al., "High-power AlGaN/GaN HEMTs for Ka-band applications," in IEEE Electron Device Letters, vol. 26, no. 11, pp. 781-783, Nov. 2005.

frequency of 30 GHz. Additionally, to be practical for future RF electronics, the new transistor technology will be required to achieve specifications of noise figure, power gain, and output power as outlined in Table 1.

Phase I: Material and Device Proof of Concept (Base – 24 months) The performer will develop a transistor technology that demonstrates an OIP3/PDC of at least 20 dB and meets the noise figure, power gain, and output power specifications outlined in Table 1.

Phase II: Transistor Scaling for Enhanced Dynamic Range I (Option – 18 months) The performer will improve the linearity of the transistor and will demonstrate an OIP3/PDC of at least 25 dB. Additionally, the transistor technology will also demonstrate the metrics for noise figure, power gain, and output power given in Table 1.

Phase III: Transistor Scaling for Enhanced Dynamic Range II (Option – 18 months) The performer will further improve the linearity of the transistor and will demonstrate an OIP3/PDC of at least 30 dB while still achieving the metrics for noise figure, power gain, and output power given in Table 1.

Table 1 – DREaM Program Metrics by TA and Phase

(a) All TA1 and TA2 device metrics will be measured in matched environment at 30 GHz. Additional on-wafer small-signal s-parameter measurements are required to demonstrate DREaM devices are capable of supporting 5% bandwidth operation around 30 GHz.

(b) Pout (W/mm and in W) and PAE must be achieved simultaneously. CW measurement required for Phase I only.

(c) Fixed baseplate temperature (≥25 oC), with either air cooling or no external cooling.

Metric Today Phase I Phase II Phase III

Center Frequency (GHz) 30

Test Condition Power Amplifier Focus (a)

Min CW Power Density (b)

(W/mm or equivalent) ~4 10 15 20

Min CW Power (Watt) (b)(c) 1~2 1 2 4

Min OIP3/P

DC

(dB) up to 10 dB backoff from peak PAE

<10 10 10 10

TA

H ig h Po w er

T ra ck

Min PAE (%)

(b) 35 40 45 50

Test Condition Low Noise Amplifier Focus (a)

Max NF (dB) 3 2 2 2

Min Gain (dB) 15 15 15 15

Min Linear P out

(dBm) 0 0 0 0

TA

H ig h Li ne ar ity T ra ck

Min OIP3/P

DC

(dB) up to 0 dBm Pout

<10 20 25 30

Proposers are invited to propose complete solutions to either TA1 or TA2 in separate proposals.

Proposers may also propose to both TA1 and TA2 in a single proposal if there is a clear rationale for doing so. Combined TA1 and TA2 proposals should clearly delineate which tasks would be required if only the TA1 or TA2 solution is desired. The Cost Proposal(s) should reflect the proposed technical area(s) with clearly defined tasks and costs.

In addition, a strong proposal is expected to clearly identify the baseline technical approaches and corresponding risk mitigation plans. The DREaM program recognizes this is a high-risk path-finding research effort. A well-defined development strategy driven by intermediate and end-of-phase program metrics is highly desired. Therefore, proposers are strongly encouraged to proposed additional intermediate milestones, e.g. every 6-months, to guide the proposed technical development toward meeting program metrics. In addition, the proposal should clearly define the test conditions of transistors such as baseplate temperature, cooling approaches, and RF input power level for consistent evaluation of DREaM transistors. Detailed recommendations on the test methodology are found in the following section.

E. Test Methodology

The test methodology of high linearity devices deserves careful planning and calibration due to the fundamental challenge of measuring small signals in the presence of much larger signals. As dynamic range increases, devices as well as the test probes, equipment, and even packaging can have non-linearity in their RF properties beyond typical measurement limits but that still degrade measured linearity at DREaM scales. Isolating these effects and extrapolating to the metrics targeted (e.g. OIP3/Pdc) is also complicated by the potential for test conditions to change under test such as when the transistor self-biases to a higher quiescent current, thus changing dc power, as RF input power increases. The performers should be aware of this technical challenge and propose the tasks accordingly. However, in preparation for this testing challenge and to encourage measurement consistency across a diverse set of device options, the government will adopt a common procedure, described below, to measure device level characteristics and encourages proposers to utilize it as well.

To evaluate the OIP3/PDC metric in TA1, the following procedure is provided for a device where PDC is not a function of input power (Pin).

Step 1: Plot in a 2-tone test the fundamental signal, IM3, PAE and PDC as a function input power all on the same plot (Figure 2).

Step 2: Locate peak PAE and draw a vertical line 10 dB backed-off from peak PAE.

Step 3: Draw a horizontal line 10 dB above PDC.

Step 4: Extrapolate the fundamental frequency from its linear region (slope = 1) until it crosses the horizontal line drawn in Step 3.

Step 5: Draw a line with a 3:1 slope that goes through the crossing point of the lines in

Steps 3 and 4.

Step 6: The device meets the OIP3/PDC metric if IM3 is always below the line drawn in

Step 5 up to the Pin value that coincides with the vertical line from Step 2.

If PDC is a function of Pin, then each IM3 (third order intermodulation) level corresponding to Pin values below 10 dB backed-off from peak PAE must be assessed by performing steps 3, 4, and 5 for the PDC corresponding to its Pin value.

The same procedure will be used to evaluate the OIP3/PDC metric in TA2, with the following changes:

1. In Step 2, locate the TA2 minimum linear Pout requirement of 0 dbm and draw a vertical line through it.

2. In Step 3, a horizontal line should be drawn at 20, 25, and 30 dB above PDC for Phase I, II, and III, respectively.

Figure 2 - Linearity measurement and evaluation assumptions for (a) TA1 and (b) TA2.

F. Schedule/Milestones

The program will use a single BAA, HR001117S0024, to solicit research proposals that achieve the program goals. Due to the possibility of multiple paths for achieving the program goals, proposers will be required to establish intermediate goals and milestones that support their strategies.

The DREaM program is expected to span the course of five years and will be divided into three separate phases. In Phase I, performers will develop a transistor technology that not only meets the Phase I goals, but also has a viable path to meeting the Phase II and Phase III goals outlined in Table 1. In Phase II, performers will enhance the transistor technology developed in Phase I to meet the Phase II goals and demonstrate a viable path to meeting the Phase III goals outlined in Table 1. In Phase III, performers will further enhance the transistor technology to meet the Phase III goals outlined in Table 1.

The performers will be assessed throughout the program based on their technical progress and in accordance with their proposed schedule of intermediate milestones. Approval of the next funding increment will require satisfactory progress against the performer’s current metrics and a clear plan to achieving the program requirements. A refinement of the performer set is expected at the end of Phase I and again at the end of Phase II.

G. Deliverables

The DREaM program requires the following deliverables:

1. Technical Reports

Technical reports shall be submitted on a monthly basis beginning within two weeks after the kick-off meeting and two working days prior to each subsequently scheduled program event, such as technical interchange meetings. Technical interchange meetings will be held quarterly.

Program reviews with all performers will be held semi-annually and will replace the technical interchange meeting. Technical reports corresponding to these program events can be submitted as annotated slide presentations. Technical reports for the months without specific program events shall be submitted as text documents. All reports shall include a technical and management work plan that documents the project schedule including milestones and is updated as required.

2. Monthly Financial Reports

The financial report shall describe resources expended, resources available, any deviation from planned expenditures and any potential issues requiring the attention of the Government team.

This report shall be provided within 10 days from the end of each month.

3. Prototype Devices

Prototype devices for each TA should be delivered to the government for independent assessment and verification of the metrics on a quarterly basis beginning at month 6. The quantity of prototype devices shall be 10 measureable devices. Packaging of the device for assessment is the responsibility of the performer. If the performance assessment can be obtained with on-wafer measurements, then no packaging is needed. Performers should also provide the government a test plan for device performance evaluation at the beginning of each program phase. Delivered devices will be returned if so requested for assistance instruments.

4. Final Report

After the end of each phase, the report shall summarize the effort in a comprehensive text document.

H. Government Furnished Equipment/Property/Information

No Government Furnished Equipment/Property/Information is available for the DREaM program.

II. Award Information

A. General Award Information

Multiple awards are anticipated. The amount of resources made available under this BAA will depend on the quality of the proposals received and the availability of funds.

The Government reserves the right to select for negotiation all, some, one, or none of the proposals received in response to this solicitation, and to make awards without discussions with proposers. The Government also reserves the right to conduct discussions if it is later determined to be necessary. If warranted, portions of resulting awards may be segregated into pre-priced options. Additionally, DARPA reserves the right to accept proposals in their entirety or to select only portions of proposals for award. In the event that DARPA desires to award only portions of a proposal, negotiations may be opened with that proposer. The Government reserves the right to fund proposals in phases with options for continued work at the end of one or more of the phases, as applicable.

Awards under this BAA will be made to proposers based on the evaluation criteria listed below (see section labeled “Application Review Information,” Sec. V.), and program balance to provide overall value to the Government. The Government reserves the right to request any additional, necessary documentation once it makes the award instrument determination. Such additional information may include but is not limited to Representations and Certifications (see Section VI.B.4., “Representations and Certifications”). The Government reserves the right to remove proposers from award consideration should the parties fail to reach agreement on award terms, conditions and cost/price within a reasonable time or the proposer fails to timely provide requested additional information. Proposals identified for negotiation may result in a procurement contract, grant, cooperative agreement, or other transaction, depending upon the nature of the work proposed, the required degree of interaction between parties, whether or not the research is classified as Fundamental Research, and other factors.

Proposers looking for innovative, commercial-like contractual arrangements are encouraged to consider requesting Other Transactions. To understand the flexibility and options associated with Other Transactions, consult www.darpa.mil/work-with-us/contract-management#OtherTransactions.

In all cases, the Government contracting officer shall have sole discretion to select award instrument type, regardless of instrument type proposed, and to negotiate all instrument terms and conditions with selectees. DARPA will apply publication or other restrictions, as necessary, if it determines that the research resulting from the proposed effort will present a high likelihood of disclosing performance characteristics of military systems or manufacturing technologies that are unique and critical to defense. Any award resulting from such a determination will include a http://www.darpa.mil/work-with-us/contract-management#OtherTransactions requirement for DARPA permission before publishing any information or results on the program. For more information on publication restrictions, see the section below on Fundamental Research.

B. Fundamental Research

It is DoD policy that the publication of products of fundamental research will remain unrestricted to the maximum extent possible. National Security Decision Directive (NSDD) 189 defines fundamental research as follows:

‘Fundamental research’ means basic and applied research in science and engineering, the results of which ordinarily are published and shared broadly within the scientific community, as distinguished from proprietary research and from industrial development, design, production, and product utilization, the results of which ordinarily are restricted for proprietary or national security reasons.

As of the date of publication of this BAA, the Government expects that program goals as described herein may be met by proposers intending to perform fundamental research and proposers not intending to perform fundamental research or the proposed research may present a high likelihood of disclosing performance characteristics of military systems or manufacturing technologies that are unique and critical to defense. Based on the nature of the performer and the nature of the work, the Government anticipates that some awards will include restrictions on the resultant research that will require the awardee to seek DARPA permission before publishing any information or results relative to the program.

Proposers should indicate in their proposal whether they believe the scope of the research included in their proposal is fundamental or not. While proposers should clearly explain the intended results of their research, the Government shall have sole discretion to select award instrument type and to negotiate all instrument terms and conditions with selectees. Appropriate clauses will be included in resultant awards for non-fundamental research to prescribe publication requirements and other restrictions, as appropriate. This clause can be found at www.darpa.mil/work-with-us/additional-baa.

For certain research projects, it may be possible that although the research being performed by the awardee is restricted research, a subawardee may be conducting fundamental research. In those cases, it is the awardee’s responsibility to explain in their proposal why its subawardee’s effort is fundamental research

III. Eligibility Information

All responsible sources capable of satisfying the Government's needs may submit a proposal that shall be considered by DARPA.

http://www.darpa.mil/work-with-us/additional-baa

A. Eligible Applicants

1. Federally Funded Research and Development Centers (FFRDCs) and Government Entities

a) FFRDCs

FFRDCs are subject to applicable direct competition limitations and cannot propose to this BAA in any capacity unless they meet the following conditions: (1) FFRDCs must clearly demonstrate that the proposed work is not otherwise available from the private sector. (2) FFRDCs must provide a letter on official letterhead from their sponsoring organization citing the specific authority establishing their eligibility to propose to Government solicitations and compete with industry, and their compliance with the associated FFRDC sponsor agreement’s terms and conditions. This information is required for FFRDCs proposing to be awardees or subawardees.

b) Government Entities

Government Entities (e.g., Government/National laboratories, military educational institutions, etc.) are subject to applicable direct competition limitations. Government entities must clearly demonstrate that the work is not otherwise available from the private sector and provide written documentation citing the specific statutory authority and contractual authority, if relevant, establishing their ability to propose to Government solicitations.

c) Authority and Eligibility

At the present time, DARPA does not consider 15 U.S.C. § 3710a to be sufficient legal authority to show eligibility. While 10 U.S.C.§ 2539b may be the appropriate statutory starting point for some entities, specific supporting regulatory guidance, together with evidence of agency approval, will still be required to fully establish eligibility. DARPA will consider FFRDC and Government entity eligibility submissions on a case-by-case basis; however, the burden to prove eligibility for all team members rests solely with the proposer.

2. Non-U.S. Organizations and/or Individuals

Non-U.S. organizations and/or individuals may participate to the extent that such participants comply with any necessary nondisclosure agreements, security regulations, export control laws, and other governing statutes applicable under the circumstances.

B. Organizational Conflicts of Interest

FAR 9.5 Requirements In accordance with FAR 9.5, proposers are required to identify and disclose all facts relevant to potential OCIs involving the proposer’s organization and any proposed team member (subawardee, consultant). Under this Section, the proposer is responsible for providing this disclosure with each proposal submitted to the BAA. The disclosure must include the proposer’s, and as applicable, proposed team member’s OCI mitigation plan. The OCI mitigation plan must include a description of the actions the proposer has taken, or intends to take, to prevent the existence of conflicting roles that might bias the proposer’s judgment and to prevent the proposer from having unfair competitive advantage. The OCI mitigation plan will specifically discuss the disclosed OCI in the context of each of the OCI limitations outlined in FAR 9.505-1 through FAR 9.505-4.

Agency Supplemental OCI Policy In addition, DARPA has a supplemental OCI policy that prohibits contractors/performers from concurrently providing Scientific Engineering Technical Assistance (SETA), Advisory and Assistance Services (A&AS) or similar support services and being a technical performer.

Therefore, as part of the FAR 9.5 disclosure requirement above, a proposer must affirm whether the proposer or any proposed team member (subawardee, consultant) is providing SETA, A&AS, or similar support to any DARPA office(s) under: (a) a current award or subaward; or (b) a past award or subaward that ended within one calendar year prior to the proposal’s submission date.

If SETA, A&AS, or similar support is being or was provided to any DARPA office(s), the proposal must include:

The name of the DARPA office receiving the support;

The prime contract number;

Identification of proposed team member (subawardee, consultant) providing the support; and An OCI mitigation plan in accordance with FAR 9.5.

Government Procedures In accordance with FAR 9.503, 9.504 and 9.506, the Government will evaluate OCI mitigation plans to avoid, neutralize or mitigate potential OCI issues before award and to determine whether it is in the Government’s interest to grant a waiver. The Government will only evaluate OCI mitigation plans for proposals that are determined selectable under the BAA evaluation criteria and funding availability.

The Government may require proposers to provide additional information to assist the Government in evaluating the proposer’s OCI mitigation plan.

If the Government determines that a proposer failed to fully disclose an OCI; or failed to provide the affirmation of DARPA support as described above; or failed to reasonably provide additional information requested by the Government to assist in evaluating the proposer’s OCI mitigation plan, the Government may reject the proposal and withdraw it from consideration for award.

C. Cost Sharing/Matching

Cost sharing is not required; however, it will be carefully considered where there is an applicable statutory condition relating to the selected funding instrument. Cost sharing is encouraged where there is a reasonable probability of a potential commercial application related to the proposed research and development effort.

For more information on potential cost sharing requirements for Other Transactions for Prototype, see http://www.darpa.mil/work-with-us/contract-management#OtherTransactions.

IV. Application and Submission Information

PROPOSERS ARE CAUTIONED THAT EVALUATION RATINGS MAY BE LOWERED

AND/OR PROPOSALS REJECTED IF PROPOSAL PREPARATION (PROPOSAL FORMAT,

CONTENT, ETC.) AND/OR SUBMITTAL INSTRUCTIONS ARE NOT FOLLOWED.

A. Address to Request Application Package

This announcement, any attachments, and any references to external websites herein constitute the total solicitation. If proposers cannot access the referenced material posted in the announcement found at www.darpa.mil, contact the administrative contact listed herein.

B. Content and Form of Application Submission

1. Full Proposal Format

All full proposals must be in the format given below. Proposals shall consist of two volumes:

Volume I – Technical and Management Proposal (three sections), and Volume II – Cost Proposal (four sections). The submission of other supporting materials along with the proposals is strongly discouraged and will not be considered for review. All pages shall be printed on 8-1/2 by 11 inch paper with type not smaller than 12 point. Smaller font may be used for figures, tables and charts. The page limitation for full proposals includes all figures, tables, and charts.

Section II of Volume I, Technical and Management Proposal, shall not exceed 35 pages for a proposal responding to one TA (TA1 or TA2), or 50 pages for a proposal responding to TA1 and TA2. There is no page limit for Volume II, Cost Proposal. All full proposals must be written in English.

A summary slide of the proposed effort, in editable PowerPoint format, should be submitted with the proposal. A template slide is provided as Attachment 2 to the BAA. Submit this PowerPoint file in addition to Volumes I and II of your full proposal. This summary slide does not count towards the total page count.

a. Volume I, Technical and Management Proposal

Section I. Administrative

A. Cover sheet to include:

(1) BAA number (HR001117S0024);

(2) Technical area(s) addressed;

(3) Lead Organization submitting proposal;

(4) Type of organization, selected among the following categories:

http://www.darpa.mil/

Large Organization, Small Disadvantaged Organization, Other Small Organization, HBCU, MI, Other Educational, Other Nonprofit;

(5) Proposer’s internal reference number (if any);

(6) Other team members (if applicable) and type of organization for each;

(7) Proposal title;

(8) Technical point of contact to include:

Salutation, last name, first name, street address, city, state, zip code (+4), telephone, fax (if available), electronic mail;

(9) Administrative point of contact to include:

Salutation, last name, first name, street address, city, state, zip code (+4), telephone, fax (if available), electronic mail;

(10) Total funds requested from DARPA, and the amount of cost share (if any); AND

(11) Date proposal was submitted.

B. Official transmittal letter.

The transmittal letter should identify the BAA number, the proposal by name, and the proposal reference number (if any), and should be signed by an individual who is authorized to submit proposals to the Government.

Section II. Detailed Proposal Information

A. Statement of Work (SOW) In plain English, clearly define the technical tasks/subtasks to be performed, their durations, and dependencies among them. The page length for the SOW will be dependent on the amount of the effort. For each task/subtask, provide:

1. A general description of the objective (for each defined task/activity);

2. A detailed description of the approach to be taken to accomplish each defined task/activity;

3. Identification of the primary organization responsible for task execution (prime, sub, team member, by name, etc.);

4. The completion criteria for each task/activity - a product, event or milestone that defines its completion.

5. Define all deliverables (reporting, data, reports, software, etc.) to be provided to the Government in support of the proposed research tasks/activities; AND

6. Clearly identify any tasks/subtasks (prime or subcontracted) that will be accomplished on-campus at a university, if applicable.

Note: Each Phase of the program must be separately defined in the SOW. Include a SOW for each subcontractor and/or consultant in the Cost Proposal Volume. Do not include any proprietary information in the SOW(s).

B. Results and Technology Transfer Description of the results, products, transferable technology, and expected technology transfer. This should also address mitigation of life-cycle and sustainment risks associated with transitioning intellectual property for U.S. military applications, if applicable. See also Section IV.B.10, “Intellectual Property.”

C. Technical Approach This section is the centerpiece of the proposal and should succinctly summarize the innovative claims for the proposed research and clearly describe the proposed approach without using any jargon. This section should demonstrate that the proposer has a clear understanding of the state-of the-art and should provide sufficient justification for the feasibility of the proposed approach(es). This section should include a detailed technical rationale, technical approach, and constructive plan for accomplishment of technical goals in support of innovative claims and deliverable creation.

As noted in section I.D, “Technical Areas,” a strong proposal is expected to clearly identify the proposed baseline technical approaches and corresponding risk mitigation plans and a well-defined development strategy driven by intermediate and end-of-phase program metrics is highly desired.

D. Ongoing Research Thoroughly and quantitatively describe the uniqueness and benefits of the proposed approach relative to the current state-of-art and alternate approaches. This section should include a comparison of the proposed effort with other ongoing research, indicating advantages and disadvantages of the proposed effort.

E. Proposer Accomplishments This section should include a discussion of the proposer’s previous accomplishments and work in closely related research areas.

F. Facilities Identify the facilities and equipment required to achieve the proposed goals. Clearly identify which tools and facilities are presently available to the team. For each, if it is presently available to the team, identify its location, which investigator or facility is providing it, and describe its specifications and/or qualifications. If the tool or facility is not available to the team, justify why this is the case and provide the expected cost of acquisition.

G. Teaming Describe the formal teaming arrangements, which will be used to execute this effort.

Describe the programmatic relationship between investigators and the rationale for choosing this teaming strategy. Present a coherent organization chart and integrated management strategy for the program team. For each person, indicate: (1) name, (2) affiliation, (3) abbreviated listing of all technical area tasks they will work on with roles, responsibilities, and percent time indicated, (4) discussion of the proposers’ previous accomplishments, relevant expertise and/or unique capabilities.

H. Schedules and measurable milestones Schedules and measurable milestones for the proposed research. (Note: Measurable milestones should capture key development points in tasks and should be clearly articulated and defined in time relative to start of effort.) Where the effort consists of multiple portions which could reasonably be partitioned for purposes of funding, these should be identified as options. Additionally, proposals should clearly explain the technical approach(es) that will be employed to meet or exceed each program metric and provide ample justification as to why the approach(es) is/are feasible. The milestones must not include proprietary information.

Section III. Additional Information

Information in this section may include a brief bibliography of relevant technical papers and research notes (published and unpublished) which document the technical ideas upon which the proposal is based. Copies of not more than three (3) relevant papers may be included in the submission.

b. Volume II, Cost Proposal – {No Page Limit}

All proposers, including FFRDCs, must submit the following:

Section I. Administrative

Cover sheet to include:

(1) BAA number (HR001117S0024);

(2) Technical area(s);

(3) Lead Organization submitting proposal;

(4) Type of organization, selected among the following categories:

Large Organization, Small Disadvantaged Organization, Other Small Organization, HBCU, MI, Other Educational, Other Nonprofit;

(5) Proposer’s internal reference number (if any);

(6) Other team members (if applicable) and type of organization for each;

(7) Proposal title;

(8) Technical point of contact to include:

Salutation, last name, first name, street address, city, state, zip code (+4), telephone, fax (if available), electronic mail (if available);

(9) Administrative point of contact to include:

Salutation, last name, first name, street address, city, state, zip code (+4), telephone, fax (if available), and electronic mail (if available);

(10) Award instrument requested:

Cost-Plus-Fixed Fee (CPFF), Cost-contract—no fee, cost sharing contract—no fee, or other type of procurement contract (specify), Grant, Cooperative Agreement, or Other Transaction;

(11) Place(s) and period(s) of performance;

(12) Total proposed cost separated by basic award and option(s), if any, by calendar year and by government fiscal year;

(13) Name, address, and telephone number of the proposer’s cognizant Defense Contract Management Agency (DCMA) administration office (if known);

(14) Name, address, and telephone number of the proposer’s cognizant Defense Contract Audit Agency (DCAA) audit office (if known);

(15) Date proposal was prepared;

(16) DUNS number;

(17) TIN number;

(18) CAGE Code;

(19) Subcontractor Information;

(20) Proposal validity period; AND

(21) Any Forward Pricing Rate Agreement, other such approved rate information, or such documentation that may assist in expediting negotiations (if available).

Attachment 1, the Cost Volume Proposer Checklist, must be included with the coversheet of the Cost Proposal.

Section II. Detailed Cost Information (Prime…