JA_15-15_SOW_15-5G6.pdf

DMEA#15-15

Defense Microelectronics Activity 4234 54th Street, McClellan, CA 95652

SOW #15-5G6

Justification and Approval for Other Than Full and Open Competition

1. Agency and Contracting Activity:

Office of Secretary of Defense, Defense Microelectronics Activity (DMEA).

2. Nature/Description of Action:

New Contract/Firm Fixed Price/RDT&E Funds

3. Description of Supplies/Services:

One of the lines in DMEA’s semiconductor facility is the Ultra-Thin Silicon on Sapphire (UTSi SOS) process. DMEA requires Computer Aided Design (CAD) tools in order to design Application Specific Integrated Circuits (ASIC) for the UTSi SOS process. The CAD tools must support standard cell methodology, which is a design flow used for semiconductor manufacturing. The design flow for standard cell methodology consists of several steps:

Schematic Entry, Electronic Simulation, Physical Layout, Design Rule Check, Layout Versus Schematic and Parasitic Extraction. Different CAD tools perform each step in the design flow.

Software companies have created design flow software tools called Electronic Design Automation (EDA) that integrate different CAD tools into a single environment to support all steps of ASIC design.

DMEA’s ASIC UTSi SOS process uses the Cadence Design Environment EDA. The Cadence Silicon Ensemble is a CAD tool in the Cadence Design Environment that performs digital place and route design flow functions. The tool takes a structural description, and assembles those descriptions into standard cell layouts. The Cadence Silicon Ensemble product has been discontinued and unsupported since 2008. The Cadence Virtuoso Design Implementation CAD tool is a layout editor that performs the same design flow tasks as the Cadence Silicon Ensemble.

The estimated total price to lease this software for 99 years is $408,500.

4. Authority Cited:

FAR 6.302-1, Only One Responsible Source and No Other Supplies or Services Will Satisfy Agency Requirements, modified under the authority of 41 U.S.C. 1901, Simplified Acquisition Procedures.

5. Reason for Authority Cited:

Only Cadence Virtuoso Design Implementation software will satisfy DMEA requirements.

Cadence Design Systems, Inc. manufactures Cadence Virtuoso Design Implementation software and is the only responsible source that can provide it.

CAD software designed by Cadence Design Systems contains proprietary scripting support language. This scripting language interprets and automates the execution of tasks throughout the design flow process. Since Cadence Virtuoso Design Implementation software contains this proprietary language, it is compatible with the Cadence Design Environment EDA. Use of CAD software from another source would create a significant technical risk, as the software language would not be compatible with the Cadence Design Environment EDA.

The Cadence Design Environment EDA integrates different CAD tools into a single environment to support all steps of the ASIC UTSi SOS process. If a program error, flaw, failure, or fault occurs during the design flow process, Cadence Design Systems will provide technical support for the Cadence Design Environment EDA and all Cadence CAD programs within the EDA.

Since Cadence Virtuoso Design Implementation software is a program in the Cadence Design Environment EDA, Cadence Design Systems can provide technical support both to the program and to the overall EDA. Use of a CAD program from another source would introduce foreign, potentially non-compatible source programming language into the EDA. Cadence Design Systems would not be able to offer an adequate level of technical support for an EDA containing foreign CAD software. Lack of adequate technical support for the ASIC UTSi SOS design flow process will create a significant technical risk.

DMEA foundry personnel have used only Cadence software for the ASIC UTSi SOS process.

The passage of time has allowed for DMEA foundry personnel to master Cadence software.

Cadence Virtuoso Design Implementation software performs the same tasks as the obsolete Cadence Silicon Ensemble. Since Cadence Design Systems manufactures both Silicon Ensemble and Virtuoso Design Implementation, the Cadence Design Environment can seamlessly integrate the Cadence Virtuoso Design Implementation software into the EDA. DMEA foundry personnel will be unfamiliar with a CAD program created by another source, as it will contain different software characteristics. In order for DMEA foundry design engineers to master the new CAD software, a contractor would need to train every design engineer. The amount of training required for DMEA foundry design engineers to master a new CAD tool would be a significant cost risk.

DMEA Process Design Kits (PDK) CAD files for the ASIC UTSi SOS process are written in a proprietary language understood by Cadence CAD Software. A CAD tool from another source would not understand the proprietary language, which would cause translation errors between CAD tools in the design flow to occur. The translation errors, if left unchecked, will ultimately lead to ASIC design mistakes. In order to mitigate mistakes and errors, ASIC UTSi SOS process CAD files would need to undergo quality control reviews. The amount of time required for DMEA foundry design engineers to perform quality control reviews would be a significant schedule risk.

Given these technical, cost, and schedule risks, award to any other source would result in both substantial duplication of cost to the Government and unacceptable delays in fulfilling DMEA requirements.

6. Efforts to Obtain Competition:

On 22 June 2015, Edward Kurjanowicz, Contract Specialist, DMEA/MEEC posted a Sources Sought notice on www.fbo.gov with a closing date of 29 June 2015 to seek more competition.

The contract specialist received no responses to the Sources Sought. The solicitation, accompanied by this approved justification, will be posted on www.fbo.gov. The Contracting

Officer will consider quotations submitted by responsible sources in accordance with FAR 5.207(c)(16)(ii).

7. Contracting Officer’s Fair and Reasonable Cost Determination:

As stated in FAR 13.106-3(a), before making award, the contracting officer must determine that the proposed price is fair and reasonable. The contracting officer will perform price analysis on Cadence’s quote in accordance with FAR 13.106-3(2).

Typed Name: Nellie Daugherty Date: _______________

Title: Contracting Officer Signature: __________________

8. Market Research:

Market research found that larger EDA Companies constantly acquire smaller EDA companies because the design technology of smaller companies can be adapted into the larger EDA.

Market research found stand-alone layout CAD software, but most software is limited to Printed Circuit Boards (PCB).

EDA companies have two types of licensing models: perpetual and time-based. The traditional model is perpetual, with a length of 99 years. A 99-year lease is the longest possible term of a lease under historic common law, as the length of time is effectively the same as a purchase.

On 22 June 2015, Edward Kurjanowicz, Contract Specialist, DMEA/MEEC, contacted the Department of Defense Enterprise Software Initiative (DoD ESI) to seek information on blanket purchase agreements (BPA) for Cadence software. DoD ESI replied that no BPA for Cadence software exists.

Matthew Duane, Contract Specialist, DMEA/MEEC, conducted further market research to identify potential sources. The results of this research are documented in the table below:

Contractor Capability Result EMA Design Automation Authorized distributor of Cadence software.

Sells Cadence software only for designing PCBs immixGroup GSA software wholesaler No response CounterTrade Products NASA SEWP contract holder Cannot provide Virtuoso

Design software and is not an Cadence authorized reseller

Intelligent Decisions NASA SEWP contract holder Cannot provide Virtuoso Design software and is not an Cadence authorized reseller

Cadence Design Systems Manufacturer of Virtuoso Design Implementation software

Cadence Virtuoso Digital Implementation software cannot be obtained from a third party.

9. Other Facts:

daugherty Typewritten Text 27 August 2015

DOD Trusted Suppliers, including Harris Semiconductor and IBM, use the Cadence Design Suite to develop ASIC PDKs. In order for DMEA to use these PDKs for DMEA foundry specifications, the provided CAD information must be compatible with DMEA CAD software.

10. Listing of Sources:

Cadence Design Systems, Inc.

2655 Seely Avenue San Jose, CA 95134 POC: Tony Tran (V): 408-428-5190

11. Actions to Increase Competition: None

12. Technical or Requirements Certification:

I certify that the supporting data under my cognizance, which are included in the justification, are accurate and complete to the best of my knowledge and belief.

Typed Name: Suki Bhungal Date: ______________

Title: Senior Design Engineer Signature: _____________________

Project Engineers shall check appropriate box:

National Security Compromised – No posting (Rationale to PCO)

Redacted – Copy will be sent to PCO

No redaction duane Typewritten Text 27 August 2015