DARPA-BAA-12-61_ADAPTable_Sensor_System_Phase_2_FAQ.pdf

ADAPTable Sensor System Phase 2 DARPA-BAA 12-61

Frequently Asked Questions

1. Question: What is the envisioned deliverable for Platform Reference Designs? Is it just the design? A Demo? “N” Units? An application of the design?

Answer: The design plus an appropriate number of units to be specified in the proposal. Please note that the BAA states, “Proposers should clearly separate non-recurring expenses and unit build costs. Unit build costs should be given for quantities of 100, 1000, and 10,000 units.” DARPA may adjust the number of units purchased based on demand.

2. Question: Will ADAPT Hardware produced under ADAPT Phase 1 be provided as GFE to ADAPT Phase 2 platform developers?

Answer: Yes. Proposals should specify the number of ADAPT core modules required.

3. Question: What business model does DARPA anticipate will result from the development of a reference design?

Answer: DARPA intends to make the reference design available to Government laboratories, system developers, and other third parties to conduct experiments and to speed system development. Proposers are free to propose any applicable business model. However, proposers should note that the BAA states, “Reference designs should be open to allow design elements to be copied, modified and expanded by third parties. Proprietary or encumbered aspects of a design will slow development and adoption of the technology and is not responsive to this BAA… Proposers should clearly describe any restrictions on the use of the proposed technology; any such restrictions must be supported by a compelling need.”

4. Question: To what extent can a successful system integrator bidder protect the

“IP” its bringing to the program (included but not limited to) Software Source Code, Hardware Design, Platform Vehicle Design, Concept of Operations and Test/Simulation Data?

Answer: The ADAPT program does not change the bidder’s ability to protect their IP as regards to the FAR provisions related to IP.

5. Question: What sample rates are realizable on the ADC-FPGA interface?

Answer: SPI rates

6. Question: What is the latency on servicing an interrupt from an external GPIO input?

Answer: Depends upon Android load and priority.

7. Can DARPA provide design files or a bill of materials including the processors, radios, available communication protocols, available GPIO pins, and available peripheral devices on existing ADAPT hardware?

Answer: The parts list is provided in the table below:

8. Question: Are the parts indicated in Figure 1 of the BAA required or can other parts be substituted?

Answer: The parts shown in Figure 1 of the BAA are notional only. Other parts may be substituted. The important criteria are as follows:

Part Part Number

CPU/SoC Qualcomm MSM8960 OS Android ICS Memory LPDDR2

FPGA AGL400V5

WiFi/Bluetooth BCM4330 Accelerometer BMA250e Pressure/Temp/ Altitude BMP180 Gyroscope MPU-3050 E-Compass MMC328xMS A/D Converter AD7689 D/A Converter DAC8562 Light/Proximity CM36283 Interfaces micro SDIO SIMcard

MIPI

USB

An FPGA be provided for reconfigurable waveform development. The FPGA should have capacity and speed consistent with the parts indicated.

General purpose processing power. The speed and memory should be consistent with the parts indicated.

Two simultaneous transceivers. The text of the BAA specifies a desired goal frequency range and bandwidth, other parts may be considered that would provide different frequency range and bandwidth. Threshold capability would be 300MHz to 3GHz frequency range and 10 MHz bandwidth.