This SBIR Phase I award from the National Science Foundation (NSF) Technology, Innovation, and Partnerships (TIP) program (CFDA 47.084) provides $275,000 to Grayskytech, Inc. to develop an enhanced parallelism technology for faster simulation and validation of integrated circuits (ICs). The innovation aims to dramatically improve IC design verification through an instruction-less, configurable computer architecture that can solve complex Boolean equations up to 30 times faster than existing simulators. This has the potential to enable comprehensive IC verification at a faster rate and lower cost, preventing massive economic losses and environmental pollution from product recalls due to design bugs. The project, which runs from October 1, 2024 to June 30, 2025, seeks to provide IC design houses a competitive advantage in time-to-market, risk reduction, and post-silicon bug remediation through this advanced simulation technology.
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